Editor’s Take: IMEC sees 22nm EUV SRAMs as call to action

April 27, 2009 – Extending work with EUV and SRAMs from last summer’s 32nm achievement, European R&D consortium IMEC now says it has developed the “world’s first” functional 22nm CMOS SRAM cells made using EUV lithography, including the first metal layer.

Results presented at last year’s SEMICON West only used EUV to print the contact holes in 32nm SRAMs; now IMEC used an ASML EUV alpha tool to pattern both the contact (~45nm size) and metal-1 layer (60nm width, 46nm spaces). Overlay performance is “good,” IMEC said, adding that a single-patterning approach “further strengthens the case for EUV as a cost-effective solution.”

The cells, made with FinFETs, have a density of 0.099μm2, 47% smaller than the 32nm cell reported last year. For the FEOL process IMEC used a high-k/metal gate (HK+MG) FinFET platform: HfO2 dielectric, TiN as the metal gate, and NiPt for the source/drain. Minimum active FIN pitch is 90nm. FinFET layers were printed using ASML’s 1900i immersion litho tools, with metallization of contact holes done with Applied Materials contact processing modules for inter-layer barrier Ti and TiN before tungsten fill and chemical mechanical polishing. The work also was supported by research and on-site participants from IDMs, foundries, and equipment and materials suppliers, as well as support and funding from the EC program PULLNANO.

Figure 1. The ASML EUV tool at IMEC. (Source: IMEC)

“This SRAM cell integration shows that EUV photo process technology is making excellent progress as a cost-effective single patterning approach. We believe that EUV remains a candidate for use in the later stages of the 22nm technology.”

Editor’s Take:

In an e-mail exchange, IMEC researchers offered more specifics on the progress made to create the 22nm SRAMs with EUV. Resolution has improved from 35-40nm down to 25-30nm in the past six months, and line-edge roughness (LER) has moved from 5-6nm down to 4nm, with resist sensitivities of around 15-20mJ/cm2 “quite common now.” The goal of 22nm resolution will require more development in optics toward higher NA and off-axis illumination, though, capabilities not present on the current ASML alpha tool — but which they promise will be in the preproduction tools due in 2010. Target resist sensitivity of 10mJ/cm2 “seems achievable in time,” they add.

Two big sticking points for EUV development still need work: optics and resists (and the associated problem of LER). For optics, Zeiss is working “full-speed” and “many mirrors have been polished for the preproduction tools,” IMEC noted.

For resists, IMEC says “steady progress is being made.” Chemically amplified resists are required to strengthen the relatively weak EUV illumination, but balancing sensitivity, LER, and resolution needs has proven tricky. “Many different resist chemistries are being explored today to overcome these limitations but will need time to mature,” IMEC told SST.

Figure 2./B> 22nm SRAM array after metal-1 patterning (with EUV litho) and etch. (Source: IMEC)

The biggest problem is LER, which needs to be <2nm, well below the 4-5nm reported here (and the 5-6nm by SEMATECH/Albany which also has printed 22nm lines using an EUV microstepper). IMEC told SST that smoothing the resist lines as a post processing step may be required, and it is investigating this.

Perhaps more than anything, IMEC urges, the newest 22nm results should be viewed as a way to “strengthen the confidence of the industry that EUV will become the choice for 22nm and beyond,” and thus spur more investments to develop and ready the required infrastructure. — J.M., D.V.


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