May 15, 2009 – New integration trends and disruptive packaging technologies, notably 3D TSVs, will cause major technical changes in the memory semiconductor sector, but ultimately pave the way for future growth, according to a recent report from Yole Développement.

DRAM memory historically has been driven by computing applications (e.g., PCs); NOR flash has been targeted to consumer and communications devices; and NAND memory most recently seen as promising for solid-state storage (consumer devices) and as a likely replacement for hard-disk drives.

Proliferation of wireless technology (smart-phones to mobile pocket-sized computing devices) has led to increased data connectivity and integration in the form of WAN, LAN, PAN, HD multimedia, etc., collectively driving demand for higher data capacities and better power efficiency. This “is stressing established architectures” and requires new interconnects, integration schemes, and packaging technologies — particularly 3D IC integration — to support higher-performance, power-sipping devices, notes Jérôme Baron, technology and market analyst at Yole, in a statement summarizing the new report.

3D integration will be a key new application space for memory growth even as the economic downturn slows adoption of through-silicon vias (TSV) in high-volume applications such as low-cost memory, according Baron. “We see concrete signs that this market is definitely taking off, with the first 3D integrated DRAM memories being shipped this year,” he said, estimating that ~20,000 wafers of DRAM memory with 3D TSV will be shipped by year’s end, and ramping production further in 2010. By 2013, the firm expects telecom and computing sectors to be driving more than 70% of the total volume for 3D TSV stacked memories.

3-D TSV memory wafer shipments per industry, 2013 forecast. (Source: Yole Développement)

Acknowledging that 3D integration with memory is a “hot topic” in the current challenging market/macroeconomic environment, given the investment to build a 3D infrastructure, Yole expects to see “precompetitive alliances and partnerships” — likely consisting of memory manufacturers, CMOS foundries, outsourced semiconductor assembly and test (OSAT) packaging houses, fabless IC players, and integrated device manufacturers (IDMs) — to help individual suppliers mitigate risk and accelerate production.