(May 29, 2009) MINNEAPOLIS, MN — Professor Rao Tummala will keynote the 6th Annual International Wafer-Level Packaging Conference (IWLPC), October 27–30, 2009 at the Santa Clara Marriott Hotel in Santa Clara, CA.
The SMTA and Chip Scale Review present the conference. Professor Tummala is a Distinguished and Endowed Chair Professor, and Founding Director of NSF ERC at Georgia Tech, the largest Academic Center in Microsystems pioneering system-on-package (SoP) vision, since 1994. Prior to joining Georgia Tech, he was an IBM Fellow, pioneering such major technologies as the first plasma flat panel display based on gas discharge, the first and next three generations of multichip packaging based on 35-layer alumina and 61-layer LTCC with copper and copper-polymer thin film, and materials for ink-jet printing and magnetic storage.
Prof. Tummala has published 426 technical papers, holds 74 patents and inventions; authored the first modem packaging reference book, Microelectronics Packaging Handbook (Van Nostrand, 1988), undergrad textbook, Fundamentals of Microsystems Packaging (McGraw Hill, 2001), and first book introducing the SoP technology. He is a Fellow of IEEE, IMAPS, and the American Ceramic Society, and member of the National Academy of Engineering in USA and in India. He was the President of both IEEE-CPMT and the IMAPS Societies.
Sponsored jointly by the SMTA and Chip Scale Review magazine, the annual IWLPC explores cutting edge topics in wafer-level packaging and IC/MEMS/MOEMS packaging, including 3D/Stacked/CSP/SiP/SoP and mixed technology packages.
For more information, visit www.iwlpc.com.
To read Professor Tummala’s recent articles for Advanced Packaging, click:
3D Technology and Beyond: 3D All Silicon System Module
The 3DASSM Consortium: An Industry/Academia Collaboration
and
SoC vs. MCM vs SiP vs. SoP