Commercializing a WLCSP passivation layer solution

by Debra Vogler, senior technical editor, Solid State Technology

August 31, 2009 – Russell Stapleton, senior staff scientist at Lord Corp., gave SST a summary of his Aug. 26 presentation at the Arizona chapter of IMAPS (International Microelectronics and Packaging Society), about the company’s first-generation passivation layer solution for wafer-level chipscale packaging (WLCSP), expected to be commercialized in 1Q10.

Because WLCSP is often used for mobile devices and consumer products, cost is a major driver. Underfill, meanwhile, improves mechanical reliability, but sometimes is cost-prohibitive, Stapleton explained. Ideally, then, “anything [else] you can do to improve reliability without adding cost is a big advantage.”

The new material, branded as “SolderBrace,” is being presented as an alternative to underfill that increases the reliability of the package without added cost, Stapleton told SST. It is a photo-imagable frontside molding compound with a low CTE that will improve mechanical reliability without adding cost; it’s targeted at, for example, solder joints and 3D packaging and MEMS devices.

More specifically, the SolderBrace technology is a partial underfill in which a thick coating is deposited on the underside of the die; this is done at the wafer level using the same back-end tools that would normally be used for polyimide processing. As a final passivation, it would be used instead of a final polyimide coating. “It is not an adhesive; it does not bond the die to the substrate or the die to the board,” so it is a reworkable solution, Stapleton noted. The structural layer can be 40-75μm thick, or more, depending on the pitch, “and that thick layer is adding mechanical robustness to the die,” he added.


Cross-section of a WLCSP 250μm solder bump supported by the thick front-side passivation SolderBrace. (Source: Lord Corp.)

The current generation of SolderBrace commercialization is targeted to CSP pitches — i.e., 0.3mm up to 1mm pitch devices. Because the material is photosensitive, certain mask dimensions cannot be photoimaged, so the company is developing a second-generation material that will improve the resolution by changing the curative formulation and material chemistry to reduce the amount of scattering that normally would take place in a thick coating. There is no set date for commercialization of the second generation, but it is expected to be before 2011. — D.V.

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Commercializing a WLCSP passivation layer solution

by Debra Vogler, senior technical editor, Solid State Technology

August 31, 2009 – Russell Stapleton, senior staff scientist at Lord Corp., gave SST a summary of his Aug. 26 presentation at the Arizona chapter of IMAPS (International Microelectronics and Packaging Society), about the company’s first-generation passivation layer solution for wafer-level chipscale packaging (WLCSP), expected to be commercialized in 1Q10.

Because WLCSP is often used for mobile devices and consumer products, cost is a major driver. Underfill, meanwhile, improves mechanical reliability, but sometimes is cost-prohibitive, Stapleton explained. Ideally, then, “anything [else] you can do to improve reliability without adding cost is a big advantage.”

The new material, branded as “SolderBrace,” is being presented as an alternative to underfill that increases the reliability of the package without added cost, Stapleton told SST. It is a photo-imagable frontside molding compound with a low CTE that will improve mechanical reliability without adding cost; it’s targeted at, for example, solder joints and 3D packaging and MEMS devices.

More specifically, the SolderBrace technology is a partial underfill in which a thick coating is deposited on the underside of the die; this is done at the wafer level using the same back-end tools that would normally be used for polyimide processing. As a final passivation, it would be used instead of a final polyimide coating. “It is not an adhesive; it does not bond the die to the substrate or the die to the board,” so it is a reworkable solution, Stapleton noted. The structural layer can be 40-75μm thick, or more, depending on the pitch, “and that thick layer is adding mechanical robustness to the die,” he added.


Cross-section of a WLCSP 250μm solder bump supported by the thick front-side passivation SolderBrace. (Source: Lord Corp.)

The current generation of SolderBrace commercialization is targeted to CSP pitches — i.e., 0.3mm up to 1mm pitch devices. Because the material is photosensitive, certain mask dimensions cannot be photoimaged, so the company is developing a second-generation material that will improve the resolution by changing the curative formulation and material chemistry to reduce the amount of scattering that normally would take place in a thick coating. There is no set date for commercialization of the second generation, but it is expected to be before 2011. — D.V.

POST A COMMENT

Easily post a comment below using your Linkedin, Twitter, Google or Facebook account. Comments won't automatically be posted to your social media accounts unless you select to share.