Leti’s 2× wafer-level integration scheme

André Rouzaud, VP deputy, division heterogeneous integration at Leti, describes the research center’s strategy of developing two generic integration schemes at the wafer level. One strategy (TSV-free) addresses the needs of research partners that integrate chips from different sources and do not have access to the design. The second solution (silicon interposer) is for those partners that do have access to the design. He also addresses thin wafer handling.


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