October 23, 2009 – HRL Laboratories says it has fabricated and demonstrated graphene-on-silicon field-effect transistors (FET) at full wafer scale, under a government-sponsored program to use graphene in electronic components for imaging, radar, and communications applications.

Graphene offers promise for electronic devices due to its excellent properties of high current-carrying capacity, thermal conductivity, low-voltage operation, and integration with silicon CMOS — and combining all that into system-on-chip devices could generate "game-changing enhancements" in cost, resolution, and power dissipation for military systems such as imaging and communications, according to HRL.

"Silicon-compatible graphene technology would open the potential to a much more efficient, higher power, lower cost graphene technology, as well as the possibility of co-integrating graphene FETs and silicon-CMOS FETs," noted Sun-Moon, principal investigator for the CERA program and senior scientist in HRL’s microelectronics laboratory, in a statement.

The Defense Advanced Research Projects Agency’s (DARPA) "Carbon Electronics for RF Applications" (CERA) program, launched in July 2008 with HRL and others in academia, industry, and military sectors, seeks to develop graphene-based RF circuits for ultrahigh-speed and ultralow-power applications. CERA’s ultimate goal (before ending in Sept. 2012) is to demonstrate a high-performance (>10,000 cm²/Vs Hall mobility) W-band (>90GHz) low-noise amplifier using graphene transistors, and on 200mm wafers with >90% yields to make them cost-effective.

A CERA milestone was reached in Dec. 2008 with development of a graphene transistor (150nm gate length) with RF-range (26GHz) cutoff frequency. In May the technology was demonstrated on 2-in. wafer-scale using graphene on silicon carbide, showing mobility of ~6000 cm²/Vs, 6×-8× higher than current silicon n-MOSFETs.