by Griff Resor, Resor Associates

March 8, 2010 – The constant shrinking of IC features, defined by Moore’s Law, has provided great economic benefit. Those gathered at the recent SPIE Advanced Lithography Conference are dedicated to this pursuit — but their future is not clear. Optical lithography seems to be reaching its limits, finally; a replacement technology, EUV, has been in development for over 13 years. Has the time come to switch to EUVL? Can EUVL be used in production at the 22nm node in 2013? Many people at last week’s SPIE Advanced Lithography Conference were looking for the answer to these questions.

At 60 wafers/hour, most IC makers expect single exposure EUVL to be significantly cheaper than the optical alternative, which is double patterning (DPL). EUVL had a lot of good news to present — the pilot tools look real, the source power and throughput roadmaps are believable, and depth-of-focus and process windows are significantly larger with EUVL. However, reticle defect levels and at-wavelength inspection tools may not be ready, and progress on photoresist has slowed — a lot of work remains to be done over the next three years. At Tuesday night’s mock trial, the jury (the audience) decided the outcome was still too close to call. I agree.

ASML NXT3100 EUV scanner for pilot line use, expected to reach 60wph by 2011. (Source: ASML)

EUV tools

Both ASML and Nikon presented details of their EUV pilot line tools. These look robust — many design features have been transferred from existing 193nm tools. Overlay and mix-and-match with immersion tools should be good. EUV mirror coatings have been improved, providing almost a 2× gain in system transmittance — a break for the source suppliers. At the same time, EUV mirror surface roughness has been improved, so flare levels continue to decline rapidly. Delivery in 2H10 is on schedule. Designs for the follow-on production tools are nearly done; these tools will be ready by 2013, pushing the 6-mirror projection optics to higher NA, maybe as far as 0.35NA (though ASML only committed to 0.32NA). The basic tool platforms can reach 150wph throughput goals and overlay goals, if a source power of 350W is ready in time (using a 15mJ/cm² resist).

The EUV source story looked good. Cymer reported that it has reached 90W raw output. Raw output is reduced by 2× at the intermediate focus as dose control and spectral purity filtering are added. Cymer has 6 units in production, with the first pilot source scheduled for delivery this month (March). Cymer presented its roadmap to reach 350W net power output by 2013. This will be accomplished by an increase in the CO₂ laser power, improvements in conversion efficiency, and more efficient dose control. A more compact design is also planned for production EUV sources. At 350W output, ASML and Cymer expect EUV tools will provide 150wph using a 15mJ/cm² resist.

Cymer provided this EUV source roadmap to reach the higher power levels that will make EUVL cost-effective:

Contamination

As source power is scaled up there is renewed concern for the lifetime of EUV mirrors. 1.0nm of carbon buildup can cut reflectivity by 1%. Even the reticle, itself a mirror, is at risk. A few university labs have been funded to develop the engineering numbers needed to predict contamination as source power scales up, and to test mitigation methods. The alpha demo tools and pilot tools already have mitigation methods in place, using EUV pulses and a low level of oxygen to clean mirror surfaces. The reticle capping layer will probably be changed from ruthenium (Ru) to TiO₂ or Nb₂O₅, since it has been shown that the ruthenium oxidizes and loses a few percent of its reflectivity. Cymer described the contamination control in their light source — hydrogen gas keeps energetic ions from sputtering the main collector lens. Hydrogen atoms generated in the hot tin plasma combine with tin atoms to form tin tetrahydride (SnH₄), a gas that is pumped out. Small openings in the spectral purity filter, at the intermediate focus, prevent most contaminants from getting into the main tool. This data is convincing. There is time to discover and mitigate any new contamination issues that arise.

Real interest in EUV

Standing-room-only attendance at many of the EUVL papers showed that IC makers take EUVL seriously and are eager for its success. Most attendees understand that optical lithography done with 193 immersion systems, 1.35 NA, improved overlay, improved throughput, programmable pupil filling illumination choices, and active wave-front correction probably let IC makers use optical lithography for one more cycle. But they also agree it’s going to be at least 2× more expensive than the tools and processes used today for single exposure. While all the focus at SPIE was on lithography, ASML reminded us that DPL requires doubling the full tool set in a fab. Added tools for deposition, coating, developing, etching, and metrology are need for many levels. Single-exposure EUVL should be significantly cheaper if it can meet throughput and defect yields goals.

Reticles

Reducing defects on reticles looks like the pace-setting issue. To date, too few EUV reticles have been made to really indicate where we are on this learning curve. The pilot phase should remedy this situation.

The conference reviewed many reticle issues. EDA tools have been checked and can manage rule and model based OPC needed for EUV masks on 0.25NA tools at the 22nm node. E-beam reticle writers, while slow, can provide the resolution and control needed. Defect counts on reticle substrates and blanks continue to drop as new metrology tools arrive and cleaning processes improve. Optics based tools by Lasertec for reticle blank inspection and by KLA for patterned reticle inspection appear to work adequately, locating both phase and amplitude defects. The reticle carry box (SEMI standard E152) has been tested at SELETE and keeps reticles clean (measured at 46nm psl equivalent).

IC makers, however, will not put EUV into production until an at-wavelength aerial imaging tool (AIM) is ready. SEMATECH says it has rounded up six "semiconductor industry entities" to support development of such a tool. Zeiss presented their design and schedule: their at-wavelength AIM tool can be ready by the end of 2013 (if the project launch is not delayed). Some want an at-wavelength reticle pattern inspection tool, but there is no adequate EUV light source for this tool, and development will take 5-6 years.

There are SRAM and NAND memory layers, such as Via 1, that use 99% opaque reticles. This will prevent most defects from printing. These layers seem like a good place to begin using EUV lithography.

Photoresist

Resist progress has slowed seriously. A few good line and space images have been shown at 22nm hp, but no one had better images this year. The MET at Lawrence Berkeley National Labs (LBNL) has been improved, and will be upgraded further in 2010. It is clear that the limitation is in the resist, not the MET. LER and LWR remain concerns for both 193i and EUVL. Patrick Naulleau of LBNL suggested a fundamental change in the chemically amplified resist (CAR) systems may be required to move beyond 22nm line and space resolution.

Making plans

Billions in investment dollars need to be put at risk soon if the IC industry is to keep pace with Moore’s Law — all agree this effort is required. It is clear that EUV pilot lines and 193nm immersion pilot lines using double patterning will be run in parallel over the next two years. Then, real bets will have to be placed.

It seems likely that designers of production lines for use in 2013 at 22nm hp will hedge their bets. The first lines probably will be designed to use both double exposure optical immersion tools and EUVL tools at the most difficult layers such as V1 and M1. If the EUVL tools work as hoped, a greater mix of EUVL will be planned for the next production lines in 2014. This might still be an added line for the 22nm node.

Note that the difference between nodes has been blurred. People now talk of 2X and 1X process "nodes" where X may be any number from 9 to 0. So a production line for 2014 manufacturing may push from 22nm to 20nm, not all the way to 16nm in a single year. EUV tools may accomplish this by improving wave front error, reducing flare, adding off axis illumination and pushing EUV resists to a slightly lower k₁. This would only require taking a few pages out of the optical playbook.

Beyond 22nm

If EUVL has to move to the 16nm node before getting into production, this could be a showstopper. EUVL has technology and cost of ownership migration plans. These included higher NA projection optics using 8 mirrors, a 9 degree chief ray angle at the reticle (now 6 degrees), a thinner absorber on the reticle, more OPC, and even more powerful EUV sources. But this round of investment may not take place if EUV cannot generate significant revenue at the 22 nm node.

Conclusion: TBD?

The race between optical lithography and EUV lithography is really too close to call. The "jury" at Tuesday night’s mock trial reached this conclusion. At the same time, it is clear that the IC industry wants EUV because of the clear advantages it can provide. So, the race continues with large development budgets supporting both contenders. By this time next year the early results for EUV pilot tools should be in, the at-wavelength AIM tool schedule should be more certain, and resist performance should be better. We will just have to wait to see how this very tight race develops.

To date, the priority for MET tools and alpha-tools has been on tool performance, resist development, and reticle yield. If EUV is to make it into production in 2013, we need to see more real IC results on selected layers. There are too few such papers now.

Griff Resor, an SST editorial advisory board member, is president of Resor Associates, ph 978-897-2200, e-mail [email protected].