MRS Day 5: Flexible electronics, Ge-Si integration, CNTs, OPV, and PCBs

by Michael A. Fury, Techcet GroupClick to Enlarge

April 20, 2010 – The fifth and final day (Friday 4/9) of the MRS Spring 2010 meeting in San Francisco called for a stretch, as flexible and stretchable electronics provided a focal point for the day. Highlights included: Ge-Si integration, carbon nanotubes in organic photovoltaics, energy storage using paper, printable GaN semiconductors, and stretchable circuit boards and conductors.

(Underscored codes at the beginning of papers reviewed refer to the symposium, session and paper number; additional presentation details can be found in the MRS Spring 2010 program.)

I6.5. Krishna Saraswat at Stanford presented a scheme for germanium integration on silicon for high-performance MOSFETs and optical interconnects. The 4% lattice mismatch between Si and Ge allows defect free Ge layers on ~2nm thick to be grown on Si. By growing thin Ge layers at 400°C and annealing in H2 at 850°C, the defects can migrate to the surface and release. Growing the Ge between islands of SiO2 allows a defect-free Ge layer to be fabricated by repeating the growth/anneal cycle until the SiO2 has been over-filled and the individual Ge wells grow together on the surface. Using this substrate, candidate device structures were shown for light emitters, detectors and modulators, the design elements needed for integrated optical interconnects.

HH16.1. Teresa Barnes at NREL is developing flexible and solution-processible transparent carbon nanotube (CNT) contacts for organic photovoltaics (OPV), with the objective of replacing the glass/ITO/hole transport layers with polymer/SWNT. The CNT layers are deposited by ultrasonic spray coating and often out-perform ITO expectations for contact sheet resistance and transparency. The OPV device design is optimized around the CNT material, rather than attempting a drop-in substitution for the ITO film.

HH16.2. Ajay Virkar at Stanford described a hybrid organic-CNT composite material for transparent electrodes in OPV. Theoretically, a CNT monolayer can have a sheet resistance of 10 Ω/sq at 95% transmission, comparable to ITO with 10-40 Ω/sq at 95% T. In practice, the contact resistance between contiguous CNT is as high as 1GΩ, so the best observed CNT TCO films have been ~80 Ω/sq at 85% T. This group has developed an overcoat that acts as a nano-solder at the CNT contact points, enabling a lower resistance with thinner layers and ≥95% T.

Other MRS blogs:
Day 4: TSVs, wafer bonding, CNTs, ALD for rare-earth HK, graphene
Day 3: Nanoimprint litho, 32nm memories, FET/Si/CNT sensors
Day 2: CVD for Cu, low-k etch stop, future FETs, graphene "atom hopping"
Day 1: Charge-trapping NVM, organics, graphene, PV

HH16.3. Kamil Mielczarek at UT Dallas demonstrated a polymeric parallel tandem OPV with transparent MWCNT as the interlayer electrode. The MWCNT are drawn as free-standing ribbons, but morphologies with high optical transmission tend to have lower conductivity, and vice versa. The spectral efficiency of the MWCNT is superior to Ag and more cost-effective. Additional work is planned to optimize the MWCNT processes to better match the electrical performance of Ag, which is commonly used as the common interlayer electrode.

JJ6.1. Liangbing Hu at Stanford showed the latest work in paper energy storage devices. The Al and Cu metal current collectors account for 20%-30% of the weight in Li-ion batteries, designed for high energy density, and supercapacitors, designed for discharge power delivery. These metals can be replaced with CNT or Ag nanowires inks screen printed on paper. Ag is the better conductor, but can be matched if you use all metallic CNT. CNT supercapacitors show excellent performance with a specific capacitance of 200 F/g, a specific energy of 47 Wh/kg (comparable to that of rechargeable batteries), a specific power of 200,000 W/kg, and a stable cycling life over 40,000 cycles.

JJ6.2. Martin Kaltenbrunner at Johannes Kepler University showed a novel power supply for stretchable electronics based on Xanthan electrolyte gel power cells, in which the anode and cathode, each ~1cm2, are laid out with a lateral separation of 0.3cm rather than on top of each other in order to eliminate the risk of shorting over time. Open circuit voltages of 1.47V and short circuit currents of up to 40mA have been achieved, with a capacity of 3mAh/cm2 active cell area.

JJ6.5. Keyan Zang at IMRE in Singapore presented a simple release method for high-quality printable GaN semiconductors. The GaN device is fabricated on a substrate with an embedded SiO2 layer designed for ease of undercut and release. The finished device is overcoated with PDMS, the SiO2 is undercut with HF, and the PDMS/GaN device is transferred to a Si or flex substrate. This scheme is an extension of what is becoming a common strategy for fabricating high performance devices for flexible substrate applications.

JJ6.6. Wayne Chen at UCSD described a process for layer transfer of high quality, single crystalline (110) InP for flexible applications. The method uses an implanted H+ layer in a geometry that avoids critical device regions, as implant damage is difficult to anneal out. The resulting devices can be lifted off the donor substrate using a ‘smart cut’ process and dual flip transfer methods. Areas up to 2mm2 and 6μm thick have been transferred without introducing defects or degrading device performance.

JJ7.2. Darryl Cotton at Cambridge showed some multilayered gold-elastomer structures in PDMS for a stretchable circuit board. The 50nm Au layer is deposited on a 5nm Cr adhesion layer on the PDMS. At 20% strain the resistance rises 2×-5×, and increases ~10% after 1000 stretch cycles. Using a photo-patternable PDMS, one can fabricate sloped vias as small as 300μm square for multilayer interconnects. A four-level touch pad with contacts to a flex circuit element was demonstrated.

JJ7.3. Frederick Bossuyt, at U Gent & IMEC outlined a journey from single conductive layer to double conductive layer stretchable electronics. Single layer designs require a zero-resistance crossover resistor at every wiring intersection. Polyimide is used as the mechanical support for copper on one side and Ag flex paste on the other. This material set can accommodate vias <100μm in diameter, with a 200μm line/space minimum pitch. In meander areas, the PI base needs to be wider than the metal traces, in order to prevent Ag paste bleed over the edges and shorts after repeated flexing.

JJ7.4. Jaewook Jeong at Seoul National University showed a novel implementation of silver electrodes on elastomeric substrates for stretchable electronics applications. Ag 700nm thick was deposited on PDMS substrates with micro-roughness (1-1.5μm) and macro-waviness (200μm deep, 400μm p-p). The micro-roughness reduces mechanical stress as the substrate stretches, and the waviness allows the metal to flex rather than pull apart. With the waves, a 50% strain results in a 3× increase in resistance. Without the waves, the maximum strain possible without failure is 35%, with an 8x resistance increase.

JJ7.5. Adam Robinson, at Cambridge showed a method for printed stretchable conductors using silver-based ink compatible with PDMS substrates. An organometallic Ag ink was chosen for its cure temperature of 130°C. However, the ink dewets during the cure process. The PDMS surface wetting was modified by molding 2μm diameter pillars 2μm high into the PDMS surface as surface tension breaks. Pillar pitches of 20μm, 10μm and 6μm showed an increasing efficacy of line-width preservation for the SonoPlot-printed lines. This technique produced printed silver conducting features of >100nm thickness, which can be stretched up to strains of 20% over 1,000 cycles without loss of conductivity.

Michael A. Fury, Ph.D, is senior technology analyst at Techcet Group, LLC, P.O. Box 29, Del Mar, CA 92014; e-mail [email protected]


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