by Michael A. Fury, Techcet Group

August 13, 2010 – Day 2 of the 15^th Annual Clarkson CAMP CMP Symposium was led by Manabu Tsujimura, corporate CTO at Ebara, who spoke on surviving the Ice age as we transition from 45nm to 20nm. While some are talking about going back to aluminum interconnects when copper reaches its electron scattering limits, Tsujimura is content to leave it marked "unknown," though he cites tungsten as one additional option. His overall message is that equipment manufacturers need their own paradigm shift for process tools if they intend to survive the upcoming node transitions.

Hiroyuki Tano from JSR Research presented some characterization work on JSR pad polymer compositions, which contain water soluble poromers that create pad "porosity on demand" as they are exposed by pad conditioning. Effective surface hardness is engineered to deliver an acceptable trade-off between planarity and defects.

Fred Sun of Cabot Microelectronics spoke about system-level optimization in CMP to concurrently maximize performance and CoO. Specific interactions between pad and conditioner were quantified against performance results, confirming that the industry’s current process is well into the regime in which 2^nd– and 3^rd-order interactions are significant. He says the demands of advanced CMP system optimization are like solving Rubik’s Cube — whereas addressing single components is more like Whack-A-Mole.

Keiichi Kimura from the Kyushu Institute of Technology described their early attempts to analyze the conditioned pad surface and material removal mechanism using FFT topography and spatial frequency analysis. Differences in spatial wavelength were observed as a function of conditioner abrasive design pattern and diamond grit diameter. This is believed to be related to slurry flow stability between the wafer and pad.

Taewook Hwang of Saint-Gobain Abrasives talked about controlling the conditioner cut rate characteristics as a function of diamond shape. A systematic correlation of pad texture with diamond shape was produced for several different kinds of pads. While IC1000 is the standard pad for such studies historically, the Cabot D100 has played a prominent role in this study and several others in this symposium.

The evolution of CMP process control led into an introduction of Applied Materials’ latest techniques designed specifically for Cu processing. Jimin Zhang described how incoming film thickness and uniformity measurements are used to compute a set of custom process conditions for each wafer. However, real time process control is still required to consistently achieve ever-tightening specs.

Bastian Noller of BASF introduced their latest approaches for dealing with CMP for through-silicon vias (TSV), as well as a new (to me) acronym: BFEOL, which means "before FEOL." (Someone needs to come up with a "final BEOL" process to complete the set — FEOL, BEOL, BFEOL, FBEOL — but I digress.) Their optimization of a TSV Cu slurry hinges on a dual crosslinking inhibitor and frangible polymer abrasive particles.

Samsung’s Jongwon Lee described the use of a sacrificial polymer layer to boost planarization efficiency of SiO₂ polishing. Photoresist is routinely used experimentally, but is too expensive to use in volume production. Their CFSP (CMP-friendly sacrificial polymer) is essentially a hardened photoresist resin without the expensive photo-active compounds.

Haedo Jeong from Pusan National U. used bare Si wafers to analyze changes in friction in process phenomena associated with CMP. This early work focused on pad conditioning and break-in, and may prove to be a useful framework for future study.

Andreas Klipp of BASF walked us through the systematic approach that was used to develop their Planapur R-P0D cleaning product for Cu PCMP. This work highlights the amount and variety of experimental data that is required to commercialize products for volume chip production. Complete removal of BTA and restoration of low-k dielectric constant are among the key design criteria that were successfully met.

Chintan Patel from Entegris spoke about their modified charge, ultra-clean PVA brushes. The essential trick is formulating the brush materials with a negative zeta potential to minimize the accumulation of particles in the brush while still effectively removing them from the wafer surface. Modified features at both ends of the brush are shown to improve the wafer edge cleaning.

Michael A. Fury, Ph.D, is senior technology analyst at Techcet Group, LLC, P.O. Box 29, Del Mar, CA 92014; e-mail [email protected].