SEMICON Europa lithography session preview with speakers

(September 27, 2010) — In a series of podcasts, 3 of the presenters at the SEMICON Europa Lithography session speak with senior technical editor Debra Vogler. Interviewees include consultant Wolfgang Arden, Rolf Seltmann of Globalfoundries, and IMEC’s Roel Gronheid.

Mask making, wafer printing, more on lithography track at SEMICON Europa: Download or Play Now
Lithography session co-chair, consultant Wolfgang Arden, recently retired from Infineon Technologies, reviews the agenda and gives his perspective on selected topics. "This year’s Lithography session of the Technology Symposium at the SEMICON show in Dresden is a good mix with highlights of the key challenges of future lithography equipment and processes,” Arden tells ElectroIQ. “We have contributions about both mask making and wafer printing. The patterning technologies cover dry optical lithography, Extreme UV (EUV) lithography and E-beam writing.” He further notes that the range of technologies covered in the session goes down to 22nm and below. “The key question is how far optical lithography can be stretched, and if and when EUV lithography will take over."
Advanced logic manufacturing: Challenges faced at the lithography step: Download or Play Now
Rolf Seltmann, lithography fellow of Globalfoundries, takes listeners through the key topics from his paper: “Lithography Challenges in Advanced Logic Semiconductor Manufacturing,” and hones in on the specific challenges of going to k1<0.3 lithography. He will cover both the pre-production phase of litho design and the manufacturing phase. Seltmann notes that in the foundry world — with multiple customers — it’s desirable to limit design rule restrictions and he will be covering the trade-offs that have to be considered and how they affect maskmaking. “With k1<0.3, strong design rule restrictions are unavoidable, unless you want to go to double-exposure or double-patterning,” notes Seltmann. “Smart design rules with optimized pixilated sources will give us the necessary margin to print tight pitches.”

EUV litho is a maturing wafer fab tech, says IMEC scientist: Download or Play Now
IMEC senior scientist Roel Gronheid summarizes key points from his paper “EUV Lithography: Recent Achievements of a Maturing Technology.” Progress on the source, reticles, and photoresists are highlighted in this review of the latest results from the alpha demo tool at IMEC. Gronheid notes that uptime has improved dramatically as a result of increased source power. His paper also tackles the challenges associated with reticles (especially obtaining clean blanks) and defect detection, as well as the pros/cons of changing the absorber thickness. With respect to photoresists, researchers have been able to push the resolution of the full-field tool at IMEC. Finally, Gronheid anticipates the possibility of being able to achieve resolution, LWR, and sensitivity specifications with a single EUV resist formulation if the LWR could be smoothed out a bit by processes outside of the actual pattern space.   

SEMICON Europa takes place October 19-21 in Dresden, Germany. Learn more about the semiconductor fab track, the advanced packaging and test track, and the MEMS track planned during the event.

Subscribe to Solid State Technology/Advanced Packaging. Follow Solid State Technology on via editors Pete Singer, and Debra Vogler, Or join our Facebook group


Easily post a comment below using your Linkedin, Twitter, Google or Facebook account. Comments won't automatically be posted to your social media accounts unless you select to share.