(December 2, 2010) — At next week’s International Electron Devices Meeting (IEDM) in San Francisco, CA, researchers from University of California at Berkeley and Texas Instruments (Dallas) will show that, among three common stressor techniques, multigate FETs (MugFETs) benefit the most from strained capping layers, also known as contact etch stop liners (CESLs). Laura Peters, contributing editor, reports.

The study compares the performance boosts from CESL-induced stress, biaxial substrate bending, and strained gate methods on finFET and trigate FET devices with various fin orientations and aspect ratios.

The Berkeley/TI team fabricated MugFETs on (100) SOI substrates with <100> or <110> fin orientations (in the current flow direction) with fin widths ranging from 20-35nm and fin height of 58nm. Each fin had 2nm oxide top and sidewall surfaces. Field effect mobility values were extracted using a split CV method from long-channel devices. A bending apparatus was used to induce biaxial tensile stress.

Simulation was used to compare the impact of various stressors. In FinFETs, the electron mobility is more sensitive to stress for a <110> oriented fin and CESL provides the greatest enhancement. The team calculated electron scattering rates, which were not notably impacted by stress. They concluded that the mobility enhancement can be attributed to a reduction in carrier effective due to shear stress. FinFET hole mobility followed a similar trend with the <110> oriented fin, with CESL providing the greatest enhancement, caused by reductions in carrier scattering rate and carrier effective mass.

Figure 1. Simulated electron mobility enhancement vs. stress for FinFET (H=58nm, W=20nm) and trigate FET (H=20nm, W=58nm) structures. (Source: UC Berkeley/Texas Instruments)

Figure 2. Simulated hole mobility enhancement vs. stress for FinFET (H=58nm, W=20nm) and trigate FET (H=20nm, W=58nm) structures. (Source: UC Berkeley/Texas Instruments)

Figures 1 and 2 show the electron and hole mobilities as a function of channel stress for FinFETs versus trigate FETs. At low stress levels, electron mobility is higher for the trigate FET. But electron mobilities are comparable for FinFETs and trigate FETs at high stress levels. Hole mobilities are higher for the FinFETs, with the exception of CESL-induced stresses of >600MPa.

In short-channel devices, quasi-ballistic transport significantly impacts carrier mobility and velocity. The Berkeley/TI team used split CV measurements of short-channel devices to calculate the effective gate lengths of the fabricated devices. Extracted short-channel electron and hole mobilities were compared to calculated apparent mobility values, showing the extracted values are much lower than expected from consideration of the impact of ballistic transport alone. The group attributed the difference to strong dopant/defect scattering in scaled devices. They concluded that carrier injection velocity in short-channel devices is largely dependent on carrier mobility. The CESL-induced stress technique will provide the greatest performance boost for FinFET and trigate devices among CESL, biaxial stress and gate stress techniques.

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