February 28, 2011 — Geoff Irvine, SAFC Hitech, reviews, from a chemical precursor designer and manufacturer’s standpoint, the development and introduction of high-k layers into the semiconductor industry. Irvine focuses on how the evolution of deposition techniques and the materials used in the construction of memory devices (DRAM) has affected the development of precursors by chemical suppliers, and looks at the challenges that lay ahead for the industry as a whole and, in particular, the next-generation of high-k and ultra-high-k layers and precursors.
Over the last 10 to 15 years, the semiconductor industry has steadily introduced new materials and fabrication techniques in key technology areas for memory and logic applications. New materials are necessitated by the continuing shrinkage of devices (prohibiting the use of previous technologies), the demand from consumers for ever more sophisticated electronic devices, and the desire to follow Moore’s Law.
One of the most publicized areas of development has been the introduction of high dielectric constant (high-k) layers that have been implemented in logic (transistor) devices. Recently, both Intel and IBM publicized the use of hafnium-based dielectric layers in their gate stacks. However, high-k layers and alternative deposition techniques, such as atomic layer deposition (ALD), have been utilized in memory (capacitor) devices over at least the last ten years, so memory manufactures have been leading the way in this technology area.
Semiconductor materials timeline
The term silicon chip accurately reflects the historical composition base for the majority of layers in a semiconductor device. From the 1970s through to the mid-1990s, the original DRAM capacitor structures, including a mixture of silicon oxide, polysilicon, silicon oxynitride and silicon nitride to define the electrodes and dielectric layer, were examined with an aim to increase the capacitor density, and design changes were implemented that allowed the same materials to be used throughout this period.
|Figure 1. Moore’s Law mapped against Intel DRAM device introductions.|
Important factors such as high breakdown voltage and high capacitance were met by silicon materials, giving the chemical precursor supplier very little to do, as existing deposition technologies were extended and optimized using the same chemicals. The architecture of DRAM devices continued to evolve over time from 2D to 3D, in addition to the dielectric layer changing from SiO2 to Si3N4. The Si3N4 dielectric layer was then further optimized to give lower leakage and higher capacitance but still, Si-based layers dominated. In the mid-1990s, however, the limitations of silicon-based systems began to show, and the need for evolutionary change could not be postponed any longer. The demand for improved performance led the industry to consider alternative materials due to identified road blocks in scaling and physical limitations in the standard film properties (Fig. 1) . With increasing urgency, new dielectrics were investigated to meet market demands as conventional technologies reached their maximum potential.
Figure 2. New material integration in transistor devices.
As the semiconductor industry accepted that new, non-silicon based materials in the dielectric layer would be needed, a significant amount of research was conducted to establish viable alternatives. The numerous potential materials included Ta2O5, TiO2, (Ba,Sr)TiO3, ZrO2, Pb(ZrTi)O3, HfO2, Al2O3, and new activity in materials research finally gave the chemist and precursor supplier advanced goals toward which to work. Figure 2 shows the layers within a silicon transistor versus a high-k based transistor.
|Figure 3. MOCVD process schematic.|
Initially, the majority of research on these new layers involved metal organic chemical vapour deposition (MOCVD) (Fig. 3). This process involved the use of volatile metal organic chemicals such as tantalum ethoxide, strontium bis(2,2,6,6-tetramethyl-3,5-heptanedionate) and trimethylaluminium (TMA), among others. Where a complex oxide layer, such as (Ba,Sr)TiO3, was desired, three precursors were required and careful chemical choices ensured compatibility between all sources. Similarly, the correct introduction and control of chemicals in the vapor mixtures entering the deposition chamber were key to obtaining the desired layer stoichiometry and quality. The chemist now had an important role to play in the development of future DRAM devices and in answering mission-critical questions: Which chemicals should be used? Would deposition using tantalum ethoxide rather that tantalum butoxide give a Ta2O5 layer with different properties? Could new molecules be designed and synthesized specifically for a new era of semiconductor applications?
|Figure 4. ALD process schematic.|
With compositional control and conformal coverage of increasingly intricate surfaces gaining importance, ALD soon became the preferred choice. Again, the chemist held a pivotal role in the development of new materials for incorporation in devices. In MOCVD (Fig. 3), the layer is deposited by thermal decomposition of the gaseous precursor. So, in selecting the appropriate precursor, thermal considerations were important. For example, could you vaporize it? Was the vapor stable enough to be transported? Would it thermally decompose on the substrate? In ALD, the layer is deposited by surface reactions, i.e., chemistry on the surface (Fig. 4). In addition to some of the same thermal considerations as MOCVD, the source in ALD must react with the co-reagent. In the case of TMA for Al2O3, does it react with water or ozone? Therefore, the overall precursor design and the role of the chemist became more critical in selecting the right precursor for the desired layers.
Chemistry has enabled the number of processes available to deposit different layers to multiply exponentially, but still, the transition to inclusion in a final semiconductor product remains extremely low and resistance to change remains a key factor in an oft-conservative industry.
The first high-k material to make it into DRAM production was Ta2O5, deposited using MOCVD from tantalum ethoxide, quickly followed by Al2O3, deposited by ALD using TMA. While Al2O3 had a lower dielectric constant than Ta2O5, it had several other advantages: the layers tended to be amorphous throughout processing; there was no interaction with the TiN electrodes now being used; it acted as a diffusion barrier towards oxygen and hydrogen; and perhaps most importantly, the band gap was similar to SiO2 and much larger than Ta2O5. The TMA ALD process became the standard approach to fabricate the Al2O3 high-k layer in memory devices and applications. In addition to introducing a high-k layer, TMA also introduced the ALD deposition technique to the semiconductor industry [3,4].
The semiconductor industry does not stand still, so with the acceptance of a new material and a new deposition technique, research continued for the next generation of devices. The industry quickly focused on hafnium oxide (HfO2) and zirconium oxide (ZrO2), with HfO2, or a hafnium oxide-based material, the preferred choice. Hafnium sources were hafnium amides, with the preferred choice being tetrakis(ethylmethylamino)hafnium (TEMAH), due mainly to a good balance between its volatility and thermal stability during deposition. The second commonly used hafnium amide was tetrakis(dimethylamino)hafnium which, while having improved volatility, was less thermally stable. HfO2 has the benefit of a high-k and a reasonable band gap. However, it also has the drawback of “re-crystallizing” during the manufacturing process (often overcome by doping the layer to give HfSixOy). While this does affect the electrical properties, it allows the integration of the high-k layer so, overall, it is beneficial to the device.
While ZrO2 had initially proved tricky to integrate, these challenges were overcome. The correct phase of ZrO2 offers an improved dielectric constant compared to HfO2-based materials, but a slightly lower band gap, and there were issues surrounding leakage. The leakage issues were overcome by creating a laminate layer of ZrO2/Al2O3/ZrO2 (ZAZ). This combined the favorable dielectric properties of zirconium oxide with the favorable leakage properties of AlO2. The precursors typically used for this process are tetrakis(ethylmethylamino)zirconium (TEMAZ) and TMA, as the zirconium dimethyl derivative proved too thermally unstable. Recently, cyclopenadienyl zirconium sources have been utilized for ALD of ZrO2, due to their enhanced thermal stability when compared to TEMAZ.
The next generation of high-k
The next generation of DRAM high-k layers are difficult to predict. There is presently considerable interest in SrTiO3 (STO), but there is also work that looks at doping the already well-known zirconium, hafnium, titanium, tantalum, oxide layers to achieve an intermediate solution before introducing STO. From a chemistry perspective, the precursor development necessary for a fully compatible ALD process is hindered by the nature of the metals involved. Discovery of volatile, thermally stable molecules that are well suited to the ALD deposition technique remains an area of intense effort that will extend precursor choice beyond the limited range of substituted cyclopentadienyl compounds, such as Sr(tBu3Cp)2. Novel solutions using modified technologies for precursor design and delivery are being studied and it is hoped that the successes of the chemists in the past can be repeated to enable the next iterations of semiconductors.
Because of the complexity of CMOS devices and the ability to continue optimizing the existing silicon-based technology, high-k layers did not make an appearance in a product until several years after their introduction to DRAM devices. In fact, it was in 2008, when Intel and IBM introduced their HfSiOx-based chips. In particular, extensive testing of cross-contamination during post-deposition processing and any potential impact on device properties were needed. This delay ensured the experiences of the successful use of high-k-based films in capacitors could be transferred to transistor processes.
As with DRAM, a HfO2-based layer is used as the gate oxide material and ALD is used exclusively as the deposition technique to maximize control of interface interactions and ensure continuous films can be made even at the extreme 1-2nm thicknesses involved. Again, the chemist has been instrumental in developing the correct precursor systems to allow complete coverage with low leakage and high permittivity.
High-k materials are now used in both DRAM capacitors and CMOS transistors and could be considered enabling technologies. The use of high-k layers has enabled the continued shrinkage of CMOS transistors and DRAM capacitors, allowing a larger number of devices per unit area and, in the case of CMOS, the continued path of Moore’s Law. However, there are limitations ahead — very similar to the historical Si-based materials case — that mean that while these high-k materials move forward to replace older technologies, in all likelihood they themselves will not be used in their existing forms in 20 years time .
The high profile introduction of HfO2-based high-k layers for CMOS devices made by Intel and IBM can be seen as a step change in technology. While high-k layers have been used in DRAM capacitors for a number of years, the inclusion of one HfO2-based dielectric layer and the accompanying change to metal gate material into a logic transistor is significantly more noteworthy, as the inclusion of the HfO2-based layer requires that the next layer in the gate stack had to be changed as well, due to compatibility issues with the former layer on top. This change was from polysilicon to a metal layer. Because of the increased number of layers in a logic device, changes such as this require more effort to ensure compatibility. Many years of work has culminated in the ability to introduce new materials, new fabrication processes and new designs in a controlled fashion to meet targets.
The integration of the new elements highlighted above into a wafer fabrication process offers extreme encouragement for the future, with a more rapid uptake of advanced technologies foreseen as alternative material solutions are developed and rolled out. The lessons learned with the upgrade to current technologies will ensure a framework for future adoption is available.
A final contribution of the industrial chemist is to take the molecule of choice into a production environment where purity, consistency, and cost are the major concerns. Production and purification technologies are now the focus of research efforts to ensure availability of the chemicals now and for the future.
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 H. Seidl, et al., “A fully-integrated Al2O3 trench capacitor DRAM for sub-100nm technology,” Proc. IEDM (2002).
 E. Gerritsen, N. Emonet, C. Caillat, N. Jourdan, M. Piazza, D. Fraboulet, et al., “Evolution of materials technology for stacked-capacitors in 65nm embedded-DRAM,” Solid-State Electronics 49, 1767–1775 (2005).
 A. J. Bauer, M. Lemberger, T. Erlbacher, W. Weinreich, “High-k: latest developments and perspectives,” Materials Science Forum, Vols. 573-574, pp. 165-180 (2008).
Geoff Irvine received his MS and PhD in organometallic chemistry from the U. of Auckland, graduating with honors and is VP, Business Development at SAFC Hitech, 1429 Hilldale Ave.Haverhill, MA 01832 USA; ph.: +1 978 374 5200; [email protected].