February 21, 2011 – Researchers from the A*STAR Institute of Materials Research and Engineering and the National University of Singapore say they have fabricated a graphene field-effect transistor (FET) with ferroelectric gating, which opens the door to use in nonvolatile memory devices.

Thin films of ferroelectric material for the gate dielectric in graphene-based FET offer strong electrical polarization to introduce much higher density of carriers, and remnant electric polarization that could let them be used in nonvolatile memory to store carrier density.

Previously the teams had devised a basic graphene-ferroelectric memory device: depositing a thin ferroelectric film onto a graphene layer, to inject charge carriers and modulate the graphene’s resistance. The ferroelectric film’s polarization was controlled by electrical bias applied to the gate terminal. But realizing the two resistance states (i.e. an information bit) was only achievable by polarizing/depolarizing the ferroelectric film.

Now, the same team has upgraded the graphene FET device with additional SiO₂ dielectic gate below the graphene layer (see image below), a familiar component of FETs that provides a reference point from which to measure ferroelectric gating. Monitoring the resistance of the device as a function of voltages applied to the top and bottom gates gave the researchers an understanding of the graphene FET device’s performance and switching behavior. Specifically for nonvolatile memory, the SiO₂ also simplifies bit writing by providing an additional background source of charge carriers, so the ferroelectric polarization can switch between two stable states (i.e. opposite polarization orientations.)

From the abstract of the paper, published in Physical Review Letters:

[Background doping] n_BG can be used to control the ferroelectric gating by unidirectionally shifting the hysteretic ferroelectric doping in graphene. Utilizing this electrostatic effect, we demonstrate symmetrical bit writing in graphene-ferroelectric field-effect transistors with resistance change over 500% and reproducible no-volatile switching over 10^{5 cycles.}

Schematic illustration of an improved graphene–ferroelectric FET with SiO2 basal layer. (Source: A*STAR)