May 26, 2011 — Ivo Bolsens, Xilinx, compares crossover cars — sports car performance with station wagon utility — to semiconductor ASICs (high-performance) and FPGAs (flexible, easy to use, less NRE). The semiconductor industry needs a programmable platform that has ASICs’ capabilities.

Bolsens continues, "An ASIC has typically a large non-recurrent engineering [NRE] cost," saying that 28nm chips need almost one hundred million dollars invested, and then must turn a profit. FPGAs are more expensive on a component-by-component basis, but have lower NRE. Crossover SoCs should bridge the gap between ASICs and FPGAs.

Bolsens finishes the interview with a focus on 28nm 3D chip architecture — particularly the confusion around supply chain handoffs. "There has to be a lot more agreement on roadmaps and standards so that all the players…have a good understanding of where investments should go." Right now, there are "a lot of opinions."

Bolsens knows what he’s talking about. In late 2010, Xilinx introduced 28nm 7 series FPGAs using 3D packaging technologies. They dealt with the turbulence of the young 3D packaging supply chain and process flows firsthand.

Research consortia can play a role in advancing 3D packaging, as can EDA providers, Bolsens asserts.

More from the ConFab:

• Intel’s take on chip revenue growth, R&D spending, and design scaling
• Bring lithography <11nm with materials, not new steppers, says Brewer Science
• Customers, logic reshaping supplier collaboration landscape
• Connecting investments to industry trends
• Preparing, recovering from the Japan quake: One company’s response and plan
• Silicon Valley upstate: NY’s semiconductor manufacturing ambitions
• 2012 and onward for semiconductor fab managers
• 3D packaging disrupts the IC supply chain 
• KLAC: Yields are key to low costs, in traditional chips and emerging LEDs
• Supply? Tight. Demand? High. Bill McClean forecasts a good year for ICs
• Confab 2011: Making progress with EUV
• EUV, DSA ready at 11nm
• Tighter chip densities tease out litho, metrology weaknesses, says Intel