May 26, 2011 — Ivo Bolsens, Xilinx, compares crossover cars — sports car performance with station wagon utility — to semiconductor ASICs (high-performance) and FPGAs (flexible, easy to use, less NRE). The semiconductor industry needs a programmable platform that has ASICs’ capabilities.
Bolsens continues, "An ASIC has typically a large non-recurrent engineering [NRE] cost," saying that 28nm chips need almost one hundred million dollars invested, and then must turn a profit. FPGAs are more expensive on a component-by-component basis, but have lower NRE. Crossover SoCs should bridge the gap between ASICs and FPGAs.
Bolsens finishes the interview with a focus on 28nm 3D chip architecture — particularly the confusion around supply chain handoffs. "There has to be a lot more agreement on roadmaps and standards so that all the players…have a good understanding of where investments should go." Right now, there are "a lot of opinions."
Bolsens knows what he’s talking about. In late 2010, Xilinx introduced 28nm 7 series FPGAs using 3D packaging technologies. They dealt with the turbulence of the young 3D packaging supply chain and process flows firsthand.
Research consortia can play a role in advancing 3D packaging, as can EDA providers, Bolsens asserts.
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