by Michael A. Fury, Techcet Group
May 3, 2011 – The final day of the MRS Spring 2011 meeting was more like a regular wake than the Irish wake of the preceding four days, in that everyone had been high on data (and caffeine). On Friday, the halls were quite a bit more subdued, perhaps due to exhaustion. The upside of the diminished crowd was that the coffee did not run out halfway through the break. I applaud the 25 hearty souls who persevered through the last talk of the last symposium on the last day.
My movement between rooms afforded me the opportunity to visit the coffee urns on both meeting floors of Moscone West during the break. To my surprise, one floor was apparently serving Starbucks, while the other was serving Seattle’s Best. Was this a deliberate distribution of wealth among suppliers? Or a subtle class distinction between floors? Inquiring minds had to know, so I asked the head barista. It turns out that one floor used the wrong labels. (In the interest of global peace, I will not reveal which label was in error.) My own taste test confirmed that the beverages were the same, and well within acceptable parameters.
(Additional presentation details can be found online on the MRS Spring 2011 abstracts page. The underscored codes at the beginning of papers reviewed below refer to the symposium, session, and paper number.)
Interconnects and optoelectronics
Wim Bogaerts at IMEC (O10.1) opened the emerging interconnect technologies session with a review of optical interconnects for photonic devices, the primary driver being our insatiable thirst for bandwidth. Light slows down in matter in proportion to the refractive index, so lower refractive index materials are desirable to make the speed of light faster! To calibrate, we’re looking at an available bandwidth of 40THz. Silicon photonics has a scattering loss from sidewall roughness of ~1dB/cm (~50% loss per inch) but this is adequate so far for on-chip applications. High speed signal modulators for silicon photonics requires introduction of a perovskite, Ge or polymer material to operate in the 42Gbit/sec range. Photonic layers are notoriously temperature sensitive and will likely require local temperature regulators, raising a serious issue of power management.
Dunlin Tan from Nanyang Technological U. (O10.2) introduced their scheme for the use of vertically aligned carbon nanotubes (CNT) for flip-chip interconnects. A TiN barrier layer is needed to separate the metallization from the CNT catalyst for good growth without consumption or contamination of the metallization. The chosen scheme calls for a CNT-to-CNT bond between the chip and substrate, rather than CNT-to-metal.
In an effort to achieve zero-emission data computer centers, Gerhard Meijer of IBM Zurich (I11.5) decided to cool supercomputers with hot water instead of cold water. (I know what you’re thinking, but wait…) Server centers consumed 2% of global electrical power generated in 2009. Only 47% of that is consumer by the IT equipment itself, much of it driven by leakage current at those 5nm gate oxides; the rest is spent on air conditioning. Micro-channel liquid coolers fabricated in silicon would operate with a much smaller temperature gradient between the inlet water and CPU temperature. The cooling system picks up 85% of the heat generated when operating at 60°C. Net energy consumption for the prototype data center was reduced by 40%. The first commercial implementation is planned later this year for the 3PFLOPS HPC supercomputer center in Munich. The concept is being extended in PowerPoint space to interlayer liquid cooling for 3D CPU stacking. Calculations indicate an extraction capability of 7.2kW from a 10-layer CPU stack in a 4cm2 footprint.
Kris Bertness at NIST (EE10.1) showed a method for growing GaN nanowires without the use of a catalyst, which would constitute an impurity that ultimately degrades its optoelectronic properties. The wires are shown to lase with n type background carriers in undoped materials at a concentration of <1^1016cm-3. Good electroluminescence was observed in p material. The only successful p type dopant for GaN is Mg and it tends to form tapered nanowires rather than ones with a uniform thickness. She discussed a number of assumptions used for modeling of planar materials that give grossly incorrect results when applied to nanowires.
Cengiz Ozkan at UC Riverside (O10.5) explored the use of graphene and InSb nanowires for nanoscale interconnects. Graphene has the bonus property of being an effective heat spreader, and showed a sustained data transmission capability of 90Mbit/sec. This is still far from competitive with the 2.5Gbps rate of Cu over a 20cm length. The InSb wires demonstrated 10Mbit/sec without any impedance matching. Additional improvement of the CVD methods used to deposit these films is underway.
Won Lee of Sungkyunkwan U. (O10.6) used graphene interconnects to demonstrate stretchable silicon TFT ICs on a rubber substrate. The devices functioned well up to 10% stretching, limited by the particular epoxy used in their demonstration.
Nobuhiko Kanzaki from Santa Clara U. (O10.7) sought to reduce the contact resistance between FIB- and e-beam-deposited tungsten contacts and carbon nanofiber (CNF) interconnects and vias. Resistance between Au electrodes dropped from the 100MΩ range to the 10kΩ range with the use of their W contact. Comparable resistance behavior was found between the two contact deposition methods after the e-beam method was optimized. E-beam has the advantage of lower operating energy, thus less potential damage to the underlying materials.
Kyongjun Kim at Seoul National U. (O10.8) demonstrated the use of patterned solution-processed ZnO films for transparent thin film transistors (TTFTs). Conventional lithography and plasma etching are not friendly to ZnO. They define the pattern in PMMA, then spin coat a ZnO solution to fill the features. The device is then immersed in a toluene/methanol solvent that extracts water from the ZnO features and stabilizes them for subsequent annealing at 200°C. Electrical performance was within the target ranges.
Life sciences applications
Cecile Delacour of Institut Néel-CNRS, Grenoble (EE11.1) demonstrated the use of a Si FET array to detect charge propagation in neuron circuits. Seeing these alien creatures on an otherwise pristine silicon surface made my contamination engineer neurons fire stochastically, but the technique does lend credence to the origin of the Borg. This work has serious implications for the understanding of neurological disorders such as Parkinson’s disease. Sensitivity and selectivity were further enhanced by incorporating 100nm Si nanowires into the system.
Ping Xie from Charles Lieber’s group at Harvard (EE11.2) fabricated a nanowire-nanopore FET sensor for detecting DNA translocation. This is the first FET-based nanopore sequencing device and the first multiplexing sensor detection of translocation.
Rouxue Yan of UC Berkeley (EE11.3) developed a technique for single cell endoscopy using SnO2 nanowire wave guides. Such a device can facilitate selective targeting for gene or drug delivery, intracellular imaging, and sensing of molecular dynamics processes within the cell. The micromanipulator employed can control the position of the probe tip with a precision of 100nm. Using conical glass nanoprobes results in cell death in a minute or less, whereas cells survive five minutes or more with these nanowire Cells exhibit a high tolerance to rapid injection or short-term interrogation, with 85% of the cells recovering fully after withdrawal. Unlike their multi-cellular human counterparts, individual cells require neither anesthetic nor medical insurance coverage to undergo the procedure. Getting a signature on the medical waiver form is a challenge that remains to be addressed.
Tau-Hun Ha from U Texas @ Austin (OO17.5) fabricated p channel organic polymer TFTs based on diketopyrrolopyrole-naphthalene copolymer (PDPP-TNT) which has a mobility of ~1cm2/Vsec. Performance in dual gate mode was superior to single gate mode. Morphology studies vs. annealing temperature were used to explain changes in device switching response times due to inhomogeneous crystallization.
Omar Khatib at UC San Diego (OO17.6) studied the infrared signatures of ambipolar charge injection in donor-acceptor copolymer OFETs. These devices were fabricated with PBBTPD on n doped Si for ease of analysis for the purpose of studying the fundamentals of ambipolar charge transport in this class of materials. This work represents the first IR signatures of ambipolar behavior.
Fabrice Mathevet from U. Pierre et Marie Curie, Paris (OO17.7) described his studies on molecular and macromolecular semiconducting liquid crystals intended for OFET and PV applications due to their high carrier mobility. Synthesis pathways and structural characterization were described for several compounds.
Toby Nelson of CMU (OO17.8) aspires to fabricate inexpensive throwaway devices for RFID and comparable applications using a ‘transistor paint’ comprising a next-generation set of material based on DTP and DPP, with early work reported on PDDTP-DPP. Device mobility with this material was as high as 0.41cm2/Vsec is highly repeatable and quite stable in normal environmental handling.
Christian Nielsen of Imperial College London (OO17.9) discussed his work on trithienobenzene-based polymers for high-performance FETs and OPVs. The materials have good absorption in the 500nm-600nm range. Mobilities on the order of 0.3cm2/Vsec were achieved for some of the compounds explored.
Toshihiro Okamoto from the U. of Tokyo (OO17.10) focused on the synthesis of face-to-face Π-Π stacked structures using fused acene backbones. A strategy of alternating aryl and perfluoroaryl was adapted to affect more aggressive stacking interaction. Time-resolved microwave conductivity was used to evaluate photoconductivity of single crystals of the material synthesized. The molecular design formalism proved promising, but outstanding mobility results have yet to be achieved.
Atefeh Yousefi Amin at the U. of Erlangen-Nurnberg (OO17.11) fabricated high mobility (6.4cm2/Vsec) OTFT devices based on 2,7-dialkyl-benzothieno[3,2-b]benzothiophene (BTBT), resulting in a p channel transistor. Operating voltage was reduced by using a 5nm Al2O3 with a fluorinated SAM to adjust the threshold voltage from -1.8V to -1.1V (compared to -14V with an SiO2 gate dielectric).
Ajay Perumal of Technische Universität Dresden (TUD) (OO17.12) showed feasibility for alternating current OLEDs using doped organic semiconductors. A luminance of 1000Cd/m2 and a maximum efficiency of 0.37 lumens/W were achieved with the device, which does not respond to DC voltage. The luminance is attributed to the charge carrier generation and recombination, leading to formation of excitons within the device, without the injection of charge carriers through the external electrodes.
Michael A. Fury, Ph.D, is senior technology analyst at Techcet Group, LLC, P.O. Box 29, Del Mar, CA 92014; e-mail [email protected].