July 6, 2011 — Applied Materials Inc. (Nasdaq:AMAT) debuted 3 systems for next-generation DRAM chip manufacturing: the Applied Centura DPN HDTM system to improve the gate insulator scaling; the Applied Endura HAR Cobalt PVD system for high-aspect-ratio (HAR) contact structures; and the Applied Endura Versa XLR W PVD system for reduced gate stack resistance.
Key transistor technologies, borrowed from logic devices, are helping DRAM chips acheive better performance and speed, overcoming a "memory wall:" the speed of the control circuitry that transfers data between the memory cell array and external data bus. These transistors are denser and more advanced, requiring new toolsets, Applied asserts.
 |
| Figure 1. Increasing demands on DRAM periphery speed. SOURCE: Applied Materials |
The Applied Centura DPN HD system incorporates nitrogen atoms into the gate insulator to improve its electrical characteristics. The high-dose gate stack syste for oxynitride gate scaling is said to increase DRAM periphery speeds (Fig. 1), which enhance DRAM output. The HD technique builds on Applied’s decoupled plasma nitridation (DPN) technology for advanced logic and memory fab. Decoupled plasma nitridation enables high surface nitrogen content (Fig. 2). Higher nitrogen content leads to higher capacitance, thus enabling equivalent oxide thickness (EOT) scaling.
David Chu, global products management Gate Stack & Dielectrics KPU, Front End Products at Applied Materials, discusses DRAM scaling challenges in a detailed podcast interview. Listen here.
 |
| Figure 2. The gate dielectric/oxide. Decoupled plasma nitridation enables high surface nitrogen content. SOURCE: Applied Materials |
In a podcast interview, Kevin Moraes, Director of Product Management for Metal Deposition Products, at Applied Materials, explains how the Versa XLR W PVD chamber enables lower gate resistance required for 2Xnm DRAM applications (Fig. 3). He also discusses the impetus behind the HAR Cobalt PVD chamber (Fig. 4) and the need to transition from TiSi2 to cobalt (Fig. 5). Listen to Moraes’ interview here.
Cobalt replaces titanium for transistor contact metallization on the Applied Endura Cobalt PVD system. Uniform cobalt films are deposited in high-aspect-ratio contact structures with 50% lower contact resistance than titanium. DRAM devices fabbed with the lower-resisitvity element can have faster switching speed and lower power consumption.
 |
| Figure 3. Why Versa XLR W PVD chamber: enables lower gate resistance required for 2Xnm. SOURCE: Applied Materials |
The Applied Endura Versa XLR W PVD system is a tungsten-based tool that is said to offer a 20% reduction in gate stack resistivity. The optimized reactor design improves consumable component lifetimes as well.
 |
| Figure 4. Why the HAR Cobalt PVD chamber? SOURCE: Applied Materials |
The two products (PVD Co) replace the much cheaper TiCl4 process, which has been used for many years has shortcomings.An interesting side note to the introduction of these products, is that using PVD instead of CVD runs counter to industry expectations.
 |
| Figure 5. Why transition to cobalt? Smooth CoSi contacts lower device leakage and variability. SOURCE: Applied Materials |
Applied Materials Inc. (Nasdaq:AMAT) provides equipment, services and software semiconductor, flat panel display and solar photovoltaic manufacturers. Learn more at www.appliedmaterials.com.
Subscribe to Solid State Technology/Advanced Packaging.
Follow Solid State Technology on Twitter.com via editors Pete Singer, twitter.com/PetesTweetsPW and Debra Vogler, twitter.com/dvogler_PV_semi.