Top semiconductor metrology challenges from SEMATECH POV

July 13, 2011 — At SEMICON West 2011, Phil Bryson, SEMATECH, covers the top challenges in semiconductor metrology at advanced nodes.

FINFet metrology, defect inspection at design rule size, EUV mask defects are on his mind.

Right now, SEMATECH is zeroing in on legacy and replacement techniques — which can be continued to enable high-volume manufacturing, and which need to make the transition to new processes.

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