October 25, 2011 — Xilinx Inc. (Nasdaq:XLNX) began shipping its Virtex-7 2000T field programmable gate array (FPGA), a programmable logic device with 6.8 billion transistors: 2 million logic cells, a die-stack architecture, low power consumption, and a more flexible design than large ASICS and monolithic FPGAs.

Figure 1. Xilinx Virtex-7 2000T FPGA.

Xilinx structured the FPGA using its stacked silicon interconnects, a 2.5D IC packaging technology makes the FPGA the equivalent to 20 million ASIC gates. Four separate FPGA die are interconnected on a passive silicon interposer that has 10,000+ high speed interconnects (Figure 1). Aligning die on vertical planes (side by side) avoids power, heat, and reliability issues of multiple die stacked on top of each other. The interposer actually reduces stress on the low-k dielectric atop the FPGA.

Through-silicon vias (TSVs) with 10:1 aspect ratios are used to package the device. The TSVs do not interfere with system signal integrity, Liam Madden, corporate vice president of FPGA Development and Silicon Technology at Xilinx, noted in a press event for the product launch. Microbumps are used on the die, providing a huge aerial density increase over C4NP. These fab and packaging techniques are available to the industry already, Madden said. Xilinx is just combining them in a smart way to decrease power use and increase performance.

The device consumes about 19 watts at full operation, comprable to the performance of 4 monolithic FPGAs using 112 watts. In a product demonstration, the device had all cells performing some calculation, with 180000 MIPS computing power and only 20W power consumption. The software for operation cuts down on compile time by 4x.

Figure 2. Product demonstration.

The Virtex-7 2000T shares a unified architecture with Xilinx