Here’s one that combines two popular leading-edge chipmaking themes: dipping into the semiconductor material toolbox and 3D trigates. An Intel-led team will unveil trigate FinFET-type quantum well InGaAs MOSFETs with 30nm gates, delivering the best electrostatic performance of any III-V MOSFET. Two key metrics are examined: subthreshold slope and drain-induced barrier lowering. (And a special kudos to lead author Marko Radosavljevic, a fellow Bates College alum.)  [Paper #33.1, "Electrostatics Improvements in 3-D Tri-Gate Over Ultra-Thin Body Planar InGaAs Quantum Well Field Effect Transistors with High-K Gate Dielectric and Scaled Gate-to-Drain/Gate-to-Source Separation"]