imec advances CMOS beyond silicon to Ge, III-V

December 14, 2011 — Marc Heyns, fellow at research consortium imec, discusses the group’s work on chip fab materials beyond silicon, namely, germanium (Ge) and III-V, presented in paper 13.1, "Advancing CMOS beyond the silicon roadmap with germanium and III-V devices," at IEEE’s International Electron Devices Meeting (IEDM) this month.

imec has been working for several years on CMOS devices with high-mobility channel substrates. Initially imec used germanium for pMOS devices and III-V for nMOS devices. This had led to a whole new series of technologies, advancing "what you can do with CMOS beyond what you can do with silicon," Heyns says.

To implement these materials, the first step is to get them onto a 300mm or — in the future — 450mm silicon wafer for production. imec does this with aspect-ratio trapping, where Ge and III-V are regrown in trenches etched in the silicon. This yields a high-quality material, but is not without challenges. imec developed a double-step technique — etching a hole into the silicon, depositing Ge in it, and reflowing the Ge — to take care of anti-phase boundaries.

Another problem is materials passivation. imec tried ultra-thin Si layers, atomic layer deposition (ALD), and sulfur passivation, which Heyns says has yielded very good results (details in the podcast below). With ALD, Heyns says the precursor type is very important.

Also read: imec claims RRAM is smallest based on HfO2

imec also has been studying defects in the high-k layer. Sulfur passivation has been shown to lower the defect count in the high-k layer.

Then imec moved to making devices with these materials, and has been working on that for the last few years with good results, especially in SiGe. What’s next? Introducing strain. imec showed results at IEDM on how it introduced a Ge Fin to make a strain in germanium, as well as other methods.

Finally, Heyns says, once the FinFET is developed, you must look to making other novel devices, using nanowires and other advanced materials like gallium and arsenide. Heyns covers the use and benefits of these novel materials in the latter half of the podcast below.

When will Ge and III-V be seen commonly in chips? FinFETs are being introduced today, and as the industry goes to more advanced production nodes, these materials will be useful options. But, Heyns points out, this is all speculation for the moment.

Listen to Heyns’ full interview about the paper with contributor Debra Vogler below:


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Self-powered electronics: Achievements and challenges

imec presents MEMS energy harvester at IEDM

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