March 20, 2012 – BUSINESS WIRE — Teradyne (NYSE:TER) uncrated its Magnum semiconductor test system with a proprietary scalable chassis design and tester-per-board architecture for high compound parallel test efficiency (PTE) on consumer digital devices (microcontrollers, touch screen controllers, standard logic, FPGAs and embedded memory).

An optional Magnum Precision Analog Channel (MPAC) enables the system to test embedded peripherals, including ADCs and DACs found in many consumer digital SoCs. The MPAC instrument includes analog source, analog capture and precision voltage reference resources.

The MPAC can configured with up to 48 channels of source/capture/Vref, or 24 channels of source/capture/Vref plus 32 device power supply channels. Multiple MPAC instruments can be configured in a single system to enable massive multi-site test.

The Magnum offers high-accuracy measurements and throughput for common DC tests such as contact, IDD and leakage. It has an algorithmic pattern generation feature for Flash memory and functional tests with various logic vector pattern depths. 12-bit ADC testing includes INL, DNL, gain and offset; 12-bit DAC testing includes INL and DNL.

Also read: Tektronix buys Teradyne testers for better test dev, IC test range

Teradyne will showcase the Magnum test system with high density precision analog instrumentation for consumer digital device test in Booth #2169 at SEMICON China in Shanghai, March 20-22. The demonstration will highlight multi-site scalability and test for a 32-bit microcontroller from Atmel