October 11, 2012 – Soitec and Shin-Etsu Handotai (SEH) have extended their cooperation in Soitec’s Smart Cut technology with an extended 10-year licensing agreement, including a new level of joint technology cooperation, to facilitate development and wafer supply of silicon-on-insulator (SOI) wafers.

Under the agreement, Soitec and SEH will cross-license Smart Cut-related patents. SEH will continue to use Soitec’s technology to manufacture SOI wafers, and now will extend the technology to other "silicon-on-anything" materials and address a broader range of applications. (SOA is defined as any material on top of which is a thin film of plain silicon.) Soitec and Sumitomo Electric, for example, have been working to develop gallium nitride (GaN) engineered substrates for LEDs, using the Smart Cut method.

The Smart Cut wafer bonding/layer-splitting technology was developed by Michel Bruel at CEA-Leti in 1991 and spun out into Soitec in 1992. A pilot line was created in 1996, and SEH was the first company to license the technology a year later. "We have worked side by side with SEH for more than 15 years, and together we have established Smart Cut as the industry standard for manufacturing SOI," stated Paul Boudre, COO of Soitec. With an increasing need to develop new materials that can extend performance and energy efficiency for today’s (and tomorrow’s) electronics devices, "we look forward to manufacturing new products such as planar FD-SOI and SOI for FinFETs."

"We are very excited about the business opportunities for SOI products, and we look forward to working with Soitec to extend the global supply chain for new products, such as FD-SOI and SOI for FinFETs, which are showing potential benefits in mobile and embedded applications," stated Nobuo Katsuoka, SEH director, SOI process engineering department.