Why node shrinks are no longer offsetting equipment costs

October 24, 2012 – Semiconductor manufacturers can expect equipment costs to increase about 15% for each new process node, but all the advantages of moving to smaller feature sizes are no longer offsetting those costs — even with the promised advantages of a 450mm wafer transition, say Gartner analysts in a new report.

A 450mm manufacturing transition — which the industry seems to have finally embraced and is pushing ahead on multiple fronts — promises 30% cost reductions vs. 300mm wafer processing, even with the inherent extra challenges in processing the bigger wafers. (Caveat: Gartner’s bearish on the 450mm benefits, saying it might only give 10% savings, or even none at all.) New semiconductor technologies (materials, equipment, architectures) being developed could also slow the rate of cost increases.

Unfortunately, that 30% reduction from a 450mm wafer-size transition "represents about only three or four years of increasing equipment costs, and consequently, delays the inevitable," the analysts say. And even if new advanced technologies pan out as promised and reduce costs — and that’s a big "if," getting semiconductors down through the teens and into the single-digit nodes — that too will be only a temporary reprieve: "The reality is that rising costs are a permanent part of the industry, and the fundamental economics of the industry may start changing sooner rather than later."

Here’s more data they use to back up their case:

  • Equipment costs for leading-edge semiconductor manufacturing are increasing 7%-10% per year, depending on the basic process;
  • By 2016, the minumum capex budget needed to justify building a new fab will be $8B-10B for loic, $3.5B-$4.5B for DRAM, and $6B-$7B for NAND flash;
  • By 2020, current cost trends will push the pricetag for a leading-edge fab investment to a budget-melting $15B-$20B;
  • At current spending rates, only eight chipmakmers will have the financial capability to build new fabs in the next few years.

For all but those chosen few leading-edge chipmakers, here is the Gartner analysts’ advice:

  • To big chip consumers: firmly attach your supply chain to one of those few leading-edge fabs, and make sure any fabless partners link themselves to one of the few foundries remaining on the leading edge.
  • Fabless semiconductor companies: get long-standing contractual arrangements with leading-edge foundries to guarantee access.
  • For the biggest fabless companies: Even if you’re seeing short-term wafer shortages, don’t jump into manufacturing yourself — explore a joint venture with leading foundries to ensure supply.

300mm average wafer fab equipment cost projections. (Source: Gartner)

The real kicker here? Lower costs per transistor aren’t even the real driving factor for semiconductor manufacturers, it’s reducing power consumption while maintaining performance, the Gartner analysts note. That’s the key functionality driving semiconductor content in mobile devices, and that’s what is driving the market now. (It’s a little different for memory which does rely on lower unit/production costs even if it’s a slight improvement.) "Overall, the semiconductor and electronics industry will have to come to grips with the fact that traditional cost reductions with each new node are in jeopardy, and in the future, higher performance may very well come at a higher price," the analysts note.

And one more factor to consider: semiconductor average selling prices (ASPs) have benefitted from the relentless node-shrink cost reductions, but semiconductor manufacturers are unlikely to (nor should they) swallow all these cost increases by themselves for the good of the rest of the supply chain. "What is more likely is that ASP trends will reverse after years of decline, and that reversal will change the supply-and-demand economics of the industry in ways that we don’t really understand today," the Gartner analysts admit.


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