Advanced Packaging


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Advanced Packaging

Date: October 16, 2014 at 1 p.m. EST

Free to attend

Length: Approximately one hour

Speakers: Ramakanth Alapati, Senior Manager, Package Architecture and Customer Technology Group, GLOBALFOUNDRIES and Devan Iyer, Director of SC Packaging at Texas Instruments

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Back-end packaging is increasingly important to semiconductor device form factor, thermal and power performance, and costs. Compounded by the demand for lead-free processing and the soaring cost of gold, the industry is developing new approaches to packaging, including redistribution layers (RDL), through silicon vias (TSV), copper pillars, wafer-level packaging (WLP) and copper wire bonding. Experts will discuss these and other approaches in this webcast.


Rama AlapatiRamakanth Alapati, Senior Manager, Package Architecture and Customer Technology Group, GLOBALFOUNDRIES, will discuss the increasing complexity of chip-package interactions (CPI) due to expanding package options at leading edge nodes. He will discuss how foundries need to plan for qualifying multiple BEOL Stack options with the multitude of package options that customers have. He will also discuss the IO density scaling options and relative costs of each of the package types and challenges in die stacking for 2.5D technologies.

Iyer_Devan_11-20-12Devan Iyer, Director of SC Packaging at Texas Instruments will talk about why the use of copper wire bonding in semiconductor packages has seen a steady evolution in recent years. The technology offers better performance and is more economical than traditional gold wire bonding, and Texas Instruments has played an instrumental role in developing copper wire bonding across the industry. Devan will talk about the benefits of this copper wire bonding to many applications, even the extension to high-reliability auto and industrial applications.

Sponsored by EV Group and Zeta Instruments

EV Group, Inc. (EVG) is a leading supplier of processing equipment and process solutions for the manufacture of semiconductor components, microelectromechanical systems (MEMS), compound semiconductor, power and nanotechnology devices.  Key products include wafer bonding, thin-wafer processing, lithography / nanoimprint lithography (NIL) and metrology equipment as well as photo-resist coaters / developers, and wafer inspection systems.  Founded in 1980, EVG services and supports a varied network of global customers and partners all over the world.  More information about EVG is available at

Zeta Instruments is a dynamic start-up company based in Silicon Valley that specializes in wafer defect inspection and metrology instruments. We combine our innovative optics design with advanced software algorithms in products tailored for the target applications in the semiconductor and adjacent markets. In addition to innovative technologies, Zeta Instruments is focused on delivering best-in-class hardware and very user-friendly interfaces. For further details, please contact Zeta Instruments at :


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