NANIUM today announced it has successfully launched the industry’s largest Wafer-Level Chip Scale Package (WLCSP) in volume. The final units measure 25mm x 23mm and are produced on 300mm wafers, a packaging solution with proven manufacturability that was entirely developed in-house.
“Our customer, Custom Silicon Solutions, is a provider of complex mixed-signal ASIC solutions. We were requested to deliver a customized Fan-In Wafer-Level Packaging/ WLCSP solution beyond common practice, as it was nine times larger in area. Standard WLCSPs usually range up to 8mm x 8mm, in some extreme cases up to 10mm x 10mm,, said Steffen Kroehnert, Director of Technology at NANIUM.
Mike McDaid, Director of Sales at CSS, commented: “After completing a very successful high volume run of a 65nm product in eWLB at NANIUM, we approached them with our next 28nm WLCSP requirements. The first article worked as promised and enabled CSS to get to market quickly with an ASIC which is unprecedented by several times in thermal and computational performance. No other package solution in existence would have achieved the low lead resistance and high reliability we demanded. This ASIC in NANIUM’s WLCSP establishes a new world class of integration, beyond VLSI-SOC (Very Large Scale Integration System-on-Chip). The final product is just about the maximum reticle size allowed and consumes hundreds of Watts.”
The wafers with the high-performance digital chips are produced with 28nm CMOS technology and contain over 5.5 billion transistors, one of the largest transistor-count chip produced by Global Foundries. Once produced in Dresden, Germany, wafers are sent to NANIUM for packaging. Such large dies are usually packaged in Wirebond-BGA or FlipChip-BGA with a small bump pitch, applying underfill material between bumped die and FlipChip substrate to ensure the required board-level reliability. The WLCSP solution developed by NANIUM relies on a high count of 1,188 solder balls at a wide BGA pitch of 0.7mm. It has successfully passed more than 400 temperature cycles on board, as stipulated by the IPC-9701 (TC2) standard, the most critical reliability test for such device.
“It was something new that had never been accomplished in WLCSP before, and we were extremely fortunate that NANIUM decided to take on the challenge,” said Mike McDaid. “Additionally, we were very pleased with the collaborative working process with NANIUM’s engineers. Even when quite formidable design issues were encountered, they proved to be competent, detail-oriented, communicated well and respected the time constraints. We also did a thorough quality audit on-site and were very impressed with the entire manufacturing flow.”
Steffen Kroehnert also commented that “we have been very excited about taking this challenge. At NANIUM, we do our best to understand the needs of our customers and tailor solutions accordingly. CSS has been very satisfied with the performance and the reliability of the product and has approved it for release to volume manufacturing.”
WLCSP is a technology in the semiconductor packaging industry that offers the smallest package form-factor possible. It enables low-cost manufacturing, and a high performance suitable for low I/O density. WLCSP’s product applications include Mobile and consumer products, Wireless connectivity, MEMS and Sensors.