By Pete Singer, Editor-in-Chief
As packaging technology continues to advance to maintain the ever-increasing demand for faster, higher capacity, and lower power devices, wafer bumping plays an important role in enabling these capabilities. Bumps can be placed almost anywhere on the die, giving chip makers the ability to put more and more I/O points on an individual die compared to previous methods.
Inspecting bumps is becoming more challenging. The number of I/O points continues to increase. “As chip makers and OSATs need to put more bumps on an individual die, the geometries are being driven smaller and smaller just like transistor technology,” notes Mike Goodrich, vice president and general manager of Rudolph’s Inspection Business Unit.
Materials are also changing. The industry is experiencing a transition from solder bump to Cu pillar, just as it moved from an evaporated bump to a plated process, according to a new report from TechSearch International. While the transition to copper pillar is underway, SnAg remains the Pb-free solution of choice.
Laser triangulation technology in conjunction with specially designed optics and analytical algorithms is used on bump inspection systems to provide high-quality measurements of micro-bump critical dimensions at full production speeds.
“Manufacturers need to make sure all the bumps are at the same height. If you have one bump that’s too tall or too short, you start to run into connection issues that result in poor yield or a failed device,” says Goodrich. “Our systems measure bump height to make sure coplanarity is uniform across an individual die,” he added, referring to Rudolph Technologies’ Wafer Scanner Inspection Series. Combined with Discover Enterprise, Rudolph Technologies’ yield and defect management software, the tools provide yield management for 3D/2D bump and RDL metrology, bump and RDL defect detection, and macro defect inspection throughout post-fab processes.
The tools can be used in either a characterization mode, where the dimensions of every bump on every wafer is analyzed, or in a high volume manufacturing mode, where the norm is to do a sampling scenario to monitor for process excursions.
One of the biggest challenges is handling vast amounts of data. “An individual die can have several thousand bumps, which results in millions of bumps on a wafer,” Goodrich said. “The amount of data generated becomes pretty unwieldy, really fast. Being able to manage that data and turn it into information and make decisions is extremely important. We are working with customers to implement that into their process flow.”
Utilizing laser triangulation technology, the Wafer Scanner enables 3D inspection of bumps and RDL of different sizes at high speed. An optional ultra high resolution sensor enables inspection of micro bumps and RDL heights as low as 1µm. Film frame handling capability allows inspection of thin and diced wafers and features a quick-change wafer platform to switch between film frame and whole wafers.