A report that resulted from a workshop funded by Semiconductor Research Corporation (SRC) and National Science Foundation (NSF) outlines key factors limiting progress in computing—particularly related to energy consumption—and novel device and architecture research that can overcome these barriers. A summary of the report’s findings can be found at the end of this article; the full report can be accessed here.
The findings and recommendations in the report are in alignment with the nanotechnology-inspired Grand Challenge for Future Computing announced on October 20 by the White House Office of Science and Technology Policy. The Grand Challenge calls for new approaches to computing that will operate with the efficiency of the human brain. It also aligns with the National Strategic Computing Initiative (NSCI) announced by an Executive Order signed by the President on July 29.
Energy efficiency is vital to improving performance at all levels. This includes from devices and transistors to large IT systems, as well from small sensors at the edge of the Internet of Things (IoT) to large data centers in cloud and supercomputing systems.
“Fundamental research on hardware performance, complex system architectures, and new memory/storage technologies can help to discover new ways to achieve energy-efficient computing,” said Jim Kurose, the Assistant Director of the National Science Foundation (NSF) for Computer and Information Science and Engineering (CISE). “Partnerships with industry, including SRC and its member companies, are an important way to speed the adoption of these research findings.”
Performance improvements today are limited by energy inefficiencies that result in overheating and thermal management issues. The electronic circuits in computer chips still operate far from any fundamental limits to energy efficiency, and much of the energy used by today’s computers is expended moving data between memory and the central processor.
At the same time as increases in performance slow, the amount of data being produced is exploding. By 2020, an estimated 44 zettabytes of data (1 zettabyte equals 1 trillion gigabytes) will be created on an annual basis.
“New devices, and new architectures based on those devices, could take computing far beyond the limits of today’s technology. The benefits to society would be enormous,” said Tom Theis, Nanoelectronics Research Initiative (NRI) Executive Director at SRC, the world’s leading university-research consortium for semiconductor technologies.
Inspired by the neural architecture of a macaque brain, this neon swirl is the wiring diagram for a new kind of computer that, by some definitions, may soon be able to think. (Credit: Emmett McQuinn, IBM Research – Almaden)
In order to realize these benefits, a new paradigm for computing is necessary. A workshop held April 14-15, 2015 in Arlington, Va., and funded by SRC and NSF convened experts from industry, academia and government to identify key factors limiting progress and promising new concepts that should be explored. The report being announced today resulted from the workshop discussions and provides a guide to future basic research investments in energy-efficient computing.
The report builds upon an earlier report funded by the Semiconductor Industry Association, SRC and NSF on Rebooting the IT Revolution.
To achieve the Nanotechnology Grand Challenge and the goals of the NSCI, multi-disciplinary fundamental research on materials, devices and architecture is needed. NSF and SRC, both individually and together, have a long history of supporting long-term research in these areas to address such fundamental, high-impact science and engineering challenges.
Broad Conclusions
Research teams should address interdisciplinary research issues essential to the demonstration of new device concepts and associated architectures. Any new device is likely to have characteristics very different from established devices. The interplay between device characteristics and optimum circuit architectures therefore means that circuit and higher level architectures must be co-optimized with any new device. Devices combining digital and analog functions or the functions of logic and memory may lend themselves particularly well to unconventional information processing architectures. For maximum impact, research should focus on devices and architectures which can enable a broad range of useful functions, rather than being dedicated to one function or a few particular functions.
Prospects for New Devices
Many promising research paths remain relatively unexplored. For example, the gating of phase transitions is a potential route to “steep slope” devices that operate at very low voltage. Relevant phase transitions might include metal-insulator transitions, formation of excitonic or other electronic condensates, and various transitions involving structural degrees of freedom. Other promising mechanisms for low-power switching may involve transduction. Magnetoelectric devices, in which an external voltage state is transduced to an internal magnetic state, exemplify the concept. However, transduction need not be limited to magnetoelectric systems.
In addition to energy efficiency, switching speed is an important criterion in choice of materials and device concepts. For example, most nanomagnetic devices switch by magnetic precession, a process which is rather slow in the ferromagnetic systems explored to date. Magnetic precession switching in antiferromagnetic or ferrimagnetic materials could be one or more orders of magnitude faster. Other novel physical systems could be still faster. For example, electronic collective states could, in principle, be switched on sub-picosecond time scales.
More generally, devices based on computational state variables beyond magnetism and charge (or voltage) could open many new possibilities.
Another relatively unexplored path to improved energy efficiency is the implementation of adiabatically switched devices in energy-conserving circuits. In such circuits, the phase of an oscillation or propagating wave may represent digital state; devices and interconnections must together constitute circuits that are non-dissipative. Nanophotonic, plasmonic, spin wave or other lightly damped oscillatory systems might be well-suited for such an approach. Researchers should strive to address the necessary components of a practical engineering solution, including mechanisms for correction of unavoidable phase and amplitude errors.
Networks of coupled non-linear oscillators have been explored for non-Boolean computation in applications such as pattern recognition. Potential technological approaches include nanoelectromechanical, nanophotonic, and nanomagnetic oscillators. Researchers should strive for generality of function and should address the necessary components of a practical engineering solution, including devices, circuits, and architectures that allow reliable operation in the presence of device variability and environmental fluctuations.
Prospects for New Architectures
While appropriate circuits and higher level architectures should be explored and co-developed along with any new device concept, certain novel device concepts may demand greater emphasis on higher-level architecture. For example, hysteretic devices, combining the functions of non-volatile logic and memory, might enhance the performance of established architectures (power gating in microprocessors, reconfiguration of logic in field programmable gate arrays), but perhaps more important, they might play an enabling role in novel architectures (compute in memory, weighting of connections in neuromorphic systems, and more). As a second example, there has been great progress in recent years in the miniaturization and energy efficiency of linear and non-linear photonic devices and compact light emitters. It is possible that these advances will have their greatest impact, not in the ongoing replacement of metal wires by optical connections, but rather in enabling new architectures for computing. Computation “in the network” is one possible direction. In general, device characteristics and architecture appear to be highly entwined in oscillatory or energy-conserving systems. Key device characteristics may be inseparable from the coupling (connections) between devices. For non-Boolean computation, optimum architectures and the range of useful algorithms will depend on these characteristics.
In addition to the examples above, many other areas of architectural research might leverage emerging device concepts to obtain order of magnitude improvements in the energy efficiency of computing. Research topics might include architectures for heterogeneous systems, architectures that minimize data movement, neuromorphic architectures, and new approaches to Stochastic Computing, Approximate Computing, Cognitive Computing and more.