Due to the growth of the semiconductor business, the wider adoption of Cu pillar solutions and the introduction of Flip Chip technology for LED and CMOS Image Sensors (CIS) applications, the Flip Chip market is expending. Under this context, more and more industrial companies including OSATs, IDMs IC foundries and bumping house undertake in this market.
The “More than Moore” market research and strategy consulting company Yole Développement (Yole) explored this industry and proposes today a detailed technology and market report, entitled “Flip Chip: Technologies & Market Trends”. Yole’s team is daily discussing with the leaders of the Advanced Packaging industry. Based on these interactions, the consulting company highlights the evolution of the technical needs and market trends. These major results make Yole’s analysts to think that full capacity should be reached in 2017.
What are the required investments to support this growth? Are there competitive technologies such as TSMC’s new solution, high-performance integrated fan-out wafer level packaging (InFO-WLP), that could answer the market needs and compete Flip Chip technology?
Under “Flip Chip: Technologies & Market Trends” report, Yole’s advanced packaging team provides an overview of Flip Chip technology and market trends. The company reviews the competitive landscape including player dynamics and key market trends; they also detail the Flip Chip market capacity and wafer forecast. Yole’s report also includes a detailed technology roadmap.
“Based on the discussions we had with the major advanced packaging companies, at Yole, we think that demand for Flip Chip is expected to reach the current maximum capacity in 2017,” said Santosh Kumar, Senior, Technology & Market Analyst, Advanced Packaging & Semiconductor Manufacturing at Yole. And he adds: “Therefore, new investment will be needed starting in 2018.”
Since Cu pillar processing can be performed by standard foundries and IDMs, the supply chain may see some slight modification. Yole’s analysts expect higher investment in Cu pillar 12” line wafer bumping lines from wafer foundries such as TSMC and SMIC. This change will affect OSATs’ wafer bumping revenue since foundries will gain market share.
OSATs will maintain their strong position in wafer bumping and assembly thanks to of their huge experience and low cost solutions. Their business model enables them to better control the supply chain, as they provide for the complete set of flip-chip services: package design and qualification, wafer bumping, substrate in-sourcing, assembly and final test.
However, big IDM companies like Intel and Samsung maintain their dominance in terms of wafer bumping capacity.
“At Yole, we expect that even in 2020 Intel will remain the highest-capacity player in Cu pillar wafer bumping,” commented Thibault Buisson, Technology & Analyst, Advanced Packaging at Yole. Foundries and OSATs are also establishing joint ventures for wafer bumping to provide turnkey solutions to customers from chip fabrication to assembly at competitive cost.
And what about the Chinese companies? Do they have a role to play in the Flip Chip market? Chinese players are significantly increasing their presence in wafer bumping and Flip Chip assembly by mergers and acquisitions. JCET acquired STATS ChipPAC and FCI was acquired by Tianshui Huatian Technology Company.
In that context, Yole’s report, Flip Chip: Technologies & Market Trends report gives insights on the future strategies that players may adopt. A detailed description of this report is available on www.i-micronews.com, advanced packaging reports section.
Would you see any advantage in bumping the substrate/interposer with copper as opposed to the die?
At Motorola we developed all the flip chip technologies now in common use, be they electroplated solder bumped or Cu pillar capped with solder or Tin. Both types were in volume production by 1995. Bumping the substrate became attractive later when OSAT wafer bumping services were still immature or unaffordable especially for the newer types of flip chip technologies like Cu pillar. So technologies for bumping substrates were developed at least a decade ago. For details see our paper in Proc IEEE ECTC Conf. 2009. But future growth of Area Array packaging will be in low cost areas like IoT. So these days to lower cost we are trying to get rid of the flip chip substrate itself and replace it with FO WLP.