By Paul Trio (SEMI); Dalia Vernikovsky (Applied Seals NA)

Evolving Industry Priorities

As the microelectronics industry becomes more mature and products become more advanced, there is greater emphasis on improving process control deeper within the supply chain. Whereas much of the attention has historically been at the fab as well as on equipment and materials, the spotlight is now focused on components and subcomponents.

As the industry prepares for 7nm and beyond, there is a realization that high-volume manufacturing at these advanced process nodes will be gated by equipment parts performance. With device manufacturers refining advanced process recipes pushing equipment, components, and subcomponents to the fringes of their performance envelopes, control is paramount. Industry standards will be as important in providing consistent parameters to enable users to compare similar parts and assess performance differences.

The Seal Situation

The subcomponent industry challenge outlined above certainly rings true for elastomeric seals. “Seals were invented near the end of the 19th century and the disturbing fact is that their manufacturing, material composition, and overall position in the vast industry is industrial in nature,” said Dalia Vernikovsky (Applied Seals North America), SCIS co-chair,  “Unless this industry comes together to forge guidelines or standards that correlate to SEMI’s stringent applications, and we bring the awareness that seal language still correlates to the mechanical make-up (thus the metal adders and constituents of things such as magnesium ferrous oxides), not the cleanliness specifications required, 7nm manufacturing will see defects traced to those components long after they are incorporated.”

Sealed with a Standard

With a myriad of applications and a variety of options, it is often difficult for users to select appropriate sealing materials. This problem is further compounded when O-ring suppliers use different criteria for quantifying O-ring performance coupled with inconsistent parameters and test methods. Control is key: making the right choice is essential for improving equipment uptime and reducing operational costs.

SEMI F51, Guide for Elastometric Sealing Technology, has been in publication since early 2000. This Document is a basic guide for the use of seals in semiconductor fabrication equipment. However, in order to meet the latest customer requirements, the standard needed an overhaul.

In 2014, the F51 Revision Task Force, under the North America Facilities Technical Committee Chapter was chartered to bring the standard to current industry specs. After a few ballot attempts, the task force’s 5080B proposal passed technical committee review at SEMICON West 2015 (July). By fall, the 5080B Ratification Ballot met the required acceptance conditions as well as clearing the necessary procedural reviews by the ISC Subcommittee on Audits & Reviews. The latest version of SEMI F51was published in November 2015 is now available for purchase from SEMI. It defines the criteria by which sealing performance can be judged in comparable measurements and seal materials can be chosen.

Behind the Scenes: A SEMI Special Interest Group

Determining how the SEMI F51 Standard would be revised didn’t happen overnight. Even before the F51 Revision Task Force was chartered, another SEMI group architected the characterization of seals parameters required at these advanced process nodes.

The Seals Group first identified seal performance criteria in several applications or process areas. The performance criteria was mainly divided into two groups: sealing requirements (e.g., etch rate, sealing force retention) and impurities (e.g., leachable, ash, outgassing, total organic carbon [TOC] testing). Process areas included: wet etch, etch, CVD/PVD, diffusion, and sub-fab.

Once the parameters were identified, the group prioritized which characteristics it needed to focus on. These included TOC, surface extractable metal contamination, and ash metal analysis. The Seals Group then developed test methodologies for measuring each performance. If test methods or standards already existed, the group simply referenced them.

Relative Importance of Seal Performance Criteria in Several Applications/Process Areas (1 – most important, 5 – least important) Figure 1

The Seals Group is part of a SEMI Special Interest Group (SIG) focused on Semiconductor Components, Instruments, and Subsystems (SCIS). SEMI SIGs provide a forum that fosters discussion and aligns stakeholders on industry-critical issues. SCIS represents companies that produce, package and/or distribute any of the following used in semiconductor or related industries:

• Components such as seals, filters, mass flow controllers, valves, sensors, ion beam sources, etc.
• Instruments for in-line and off-line data measurement, collection, and monitoring
• Sub-systems that support process tools such as vacuum, robotics, power conversion, abatement, chillers, etc.

SCIS participation encompass Subcomponent-OEM-IDM stakeholders, including: Applied Seals NA; ASM; Brooks Automation; Busch Vacuum; Ebara; Edwards Vacuum; Entegris; Festo; GLOBALFOUNDRIES; Greene, Tweed; Horiba; Intel; KLA-Tencor; Lam Research; Pall; Parker; SMC; Swagelok; Texas Instruments; UltraClean Technology; VAT Valve.

SEMI SCIS SIG – Addressing Defectivity Problems in HVM

With defect and traceability playing a critical role in enabling high-volume manufacturing, SCIS is currently structured to focus on these problem areas. It aims to establish a framework that will enable industry partners to define:

• Measurable defects for different components specific to intended process applications
• Standardized test methods to measure the defects
• Consistent methods for reporting the results

“Increased collaboration is required to establish new industry standards and parameters associated with semiconductor process control to meet the ever increasing yield, variability, and reliability challenges that comes with continued technology scaling,” said Gary Patton, CTO and SVP of WW R&D at GLOBALFOUNDRIES. “The SEMI SCIS group is playing a very crucial role in driving alignment between semiconductor manufacturers and equipment and sub-component suppliers on successful standards for sub-component defectivity and traceability needed for future technology nodes.”

The Seals Group is just one of four subteams under SCIS focused on defectivity. Subteams are established in the following areas:

• Valves, Seals, and Pumps
• Liquid and Gas Delivery
• Critical Chamber Components and RF
• Automation

As of this writing, each SCIS subteam has identified at least one process-critical component considered to be a primary contributor to defects:

Scope of Defectivity Components Figure 2

The subteams are now focusing on establishing a standard system of comparable metrics which will be used to rate, compare, and classify each of these identified components. This process is dictated by the following template:

SCIS Defectivity Template Figure 3

The Seals Group is not resting on its laurels with the latest revision to SEMI F51. The Seals team is now working on the next set of parameters including: sealing force retention, etch rate (range), permeation, and particles (size and range).

Visibility with Traceability

SCIS is also addressing the need for improved component parts traceability that will enable effective problem diagnosis and faster resolution.

Consider this rather common scenario: Fab yield excursion is traced to a batch of custom machined parts manufactured by Supplier A on a pump supplied by Supplier B on a process tool manufactured by Supplier C.  Fab engineer requests Supplier C to provide a list of all affected systems and spares to enable global containment plan. Without a standardized traceability process in place, the list takes a week to compile, introducing delays to the corrective action. 

The Traceability Verification Subteam under SCIS is chartered to implement an industry standard parts traceability process that will:

• Define standardized formats and protocols
• Facilitate communication among suppliers, OEMs, and IDMs.
• Enable efficient problem diagnosis and resolution

“The Traceable Verification Model ensures Key Characteristics are controlled with compliance information easily accessed via a cloud based application. Intellectual property is secured via pre-approved access levels. The model holds all suppliers accountable but also ensures proprietary information is not compromised.” said Lance Dyrdahl (Lam Research), Defect Traceability Subteam leader.

Full Circle Engagement

As with the F51 seals activity, output from these SCIS Subteams will feed in to the various committees and task forces under the SEMI International Standards Program. As these Standards are used by the industry, new requirements will emerge and it will be up to SEMI Members to address them.

“Components standards should be effectively linked to the field performance for all-around benefits to component makers, OEMs and IDMs. The committee deliverables are structured to allow competitors to work together in driving commonality. Standardization and normalization methodology will provide IP-free participation.” said Ya-hong Neirynck (Intel), SCIS RF subteam co-leader. Lance Dyrdahl further pointed out, “Speedy ratification occurs when all participants agree on self-evident non-proprietary methods.”

The demands of the next-generation high-volume manufacturing will no doubt require a concerted effort among device manufacturers, OEMs, and suppliers. Diverse stakeholder participation is critical in solving these problems proactively. Failure to do so will certainly result in greater challenges (and pain) that will be shared by all.  “A piece of equipment or process line is only as strong as its weakest component,” said Sanchali Bhattacharjee (Intel), SCIS cochair.

Engaging in these SEMI SCIS initiatives provides a very strong value proposition for IDM-OEM-suppliers alike.

Engaging in SEMI SCIS Benefits All Industry Stakeholders Figure 4

The SEMI SCIS Special Interest Group is open to all SEMI Members. There will be an SCIS face-to-face meeting in conjunction with the SEMI Advanced Semiconductor Manufacturing Conference (ASMC) – May 16-19, 2016 – in Saratoga Springs, New York. Conference attendees are welcome to attend this face-to-face meeting. Future face-to-face meeting are also scheduled for SEMICON West 2016 (July) as well as the SEMI Strategic Materials Conference (SMC) in September. SCIS subteams meet via teleconference in between these face-to-face meetings. For more information or to join the SCIS SIG, please contact Paul Trio at SEMI ([email protected]).