Yearly Archives: 2016

AirProducts_logo_pms347

October 26, 2016 at 1 p.m. ET

Free to attend

Length: Approximately one hour

NEW register_button

With the change in the traditional IC scaling cadence, the expansive growth of “Big data,” and the pervasive nature of computing, rises a paradigm shift in integrated circuit scaling and microelectronic devices. The pervasive nature of computing drives a need for connecting billions of people and tens of billions of devices/things via cloud computing. Such connectivity effect will generate tremendous amount of data and would require a revolutionary change in the technology infrastructures being used to transmit, store and analyze data. The exponential impact of connectivity represents a data-centric future and drive an accelerated transformation throughout the network fabrics. Additionally, the users’ expectations and demand of emerging applications, such as autonomous driving, would not tolerate today’s level of latency and computing capacity. All aspects of the computing continuum – silicon, software and computing capacity that are staggered at different levels in the network- would need to be transformed and advanced performance would need to be pushed to lower levels of the network delivering an increased speed, capacity and an immediate access. This fundamental shift manifests itself through different device (s) requirements and is driving a third wave of technologies with a larger semiconductor footprint. With that comes an increased reliance on microelectronics packaging to deliver far more integrated, complex and advanced solutions at different levels of the network- from handheld and client interface devices to the data center, the cloud and devices at the edge. With accelerated and extended product life-cycle expectations, wearable electronics, and a large assortment of IoT devices, next-generation electronics will require several new packaging solutions.  Smaller form factors, lower power consumption, flexible designs, increased memory performance, and-more than ever­­­-a closely managed silicon package, co-optimization and architectural innovations.  Heterogeneous integration through package with technologies such as system in package (SIP), on package integration (OPI) and fan-out (WLFO and PLFO) are poised to change the packaging industry and play a disruptive role in enabling next generation devices.

The above mentioned move to cloud computing, the transformation of the network and the growth of data analysis are the fundamental growth drivers for the integrated circuit (IC) scaling moving forward. In turn, they represent a tremendous opportunity for microelectronics packaging to deliver, grow and transform into an increasingly influential and enabling role.

Speaker: 

Dr. Islam Salama, Intel Corporation

Dr. Islam Salama is with Intel Corporation responsible for packaging substrate Pathfinding of the high density interconnect across all Intel products. In this capacity, Islam manages a global team of technologists and manufacturing team responsible for delivering next generation packaging technologies. His team focuses on packaging substrate architectures, process and materials technology building blocks, intellectual property management, and manufacturing ecosystem development.

Islam has a Ph.D. in laser materials processing from the College of Optics and Photonics (CREOL), UCF and has been with Intel since 2003. Islam authored over 35 technical papers, was awarded more than 50 international patents in the fields of HDI substrate technology, laser technology, materials processing and semiconductor fabrication. Islam is an elected member of the board of directors for the Laser Institute of America (LIA), a member of the steering committee with the international technology manufacturing initiative (iNEMI), and a board member of Applicote Associates LLC-a photonics and manufacturing technology start-up.

Sponsored by Air Products 

Air Products has been a leading global supplier of high-purity gases, chemicals, and delivery systems to the electronics industry for over 40 years. We serve all major segments of the industry with a unique combination of offerings, experience, and commitment.  We’re advancing materials science. We’re advancing semiconductors. We’re advancing mobility. What can we help you advance?  www.airproducts.com/advancing

Researchers have designed a device that uses light to manipulate its mechanical properties. The device, which was fabricated using a plasmomechanical metamaterial, operates through a unique mechanism that couples its optical and mechanical resonances, enabling it to oscillate indefinitely using energy absorbed from light.

This is an optically-driven mechanical oscillator fabricated using a plasmomechanical metamaterial. Credit: UC San Diego Jacobs School of Engineering

This is an optically-driven mechanical oscillator fabricated using a plasmomechanical metamaterial. Credit: UC San Diego Jacobs School of Engineering

This work demonstrates a metamaterial-based approach to develop an optically-driven mechanical oscillator. The device can potentially be used as a new frequency reference to accurately keep time in GPS, computers, wristwatches and other devices, researchers said. Other potential applications that could be derived from this metamaterial-based platform include high precision sensors and quantum transducers. The research was published Oct. 10 in the journal Nature Photonics.

Researchers engineered the metamaterial-based device by integrating tiny light absorbing nanoantennas onto nanomechanical oscillators. The study was led by Ertugrul Cubukcu, a professor of nanoengineering and electrical engineering at the University of California San Diego. The work, which Cubukcu started as a faculty member at the University of Pennsylvania and is continuing at the Jacobs School of Engineering at UC San Diego, demonstrates how efficient light-matter interactions can be utilized for applications in novel nanoscale devices.

Metamaterials are artificial materials that are engineered to exhibit exotic properties not found in nature. For example, metamaterials can be designed to manipulate light, sound and heat waves in ways that can’t typically be done with conventional materials.

Metamaterials are generally considered “lossy” because their metal components absorb light very efficiently. “The lossy trait of metamaterials is considered a nuisance in photonics applications and telecommunications systems, where you have to transmit a lot of power. We’re presenting a unique metamaterials approach by taking advantage of this lossy feature,” Cubukcu said.

The device in this study resembles a tiny capacitor–roughly the size of a quarter–consisting of two square plates measuring 500 microns by 500 microns. The top plate is a bilayer gold/silicon nitride membrane containing an array of cross-shaped slits–the nanoantennas–etched into the gold layer. The bottom plate is a metal reflector that is separated from the gold/silicon nitride bilayer by a three-micron-wide air gap.

When light is shined upon the device, the nanoantennas absorb all of the incoming radiation from light and convert that optical energy into heat. In response, the gold/silicon nitride bilayer bends because gold expands more than silicon nitride when heated. The bending of the bilayer alters the width of the air gap separating it from the metal reflector. This change in spacing causes the bilayer to absorb less light and as a result, the bilayer bends back to its original position. The bilayer can once again absorb all of the incoming light and the cycle repeats over and over again.

The device relies on a unique hybrid optical resonance known as the Fano resonance, which emerges as a result of the coupling between two distinct optical resonances of the metamaterial. The optical resonance can be tuned “at will” by applying a voltage.

The researchers also point out that because the plasmomechanical metamaterial can efficiently absorb light, it can function under a broad optical resonance. That means this metamaterial can potentially respond to a light source like an LED and won’t need a strong laser to provide the energy.

“Using plasmonic metamaterials, we were able to design and fabricate a device that can utilize light to amplify or dampen microscopic mechanical motion more powerfully than other devices that demonstrate these effects. Even a non-laser light source could still work on this device,” said Hai Zhu, a former graduate student in Cubukcu’s lab and first author of the study.

“Optical metamaterials enable the chip-level integration of functionalities such as light-focusing, spectral selectivity and polarization control that are usually performed by conventional optical components such as lenses, optical filters and polarizers. Our particular metamaterial-based approach can extend these effects across the electromagnetic spectrum,” said Fei Yi, a postdoctoral researcher who worked in Cubukcu’s lab.

Mentor Graphics Corporation (NASDAQ:  MENT) today announced that it has acquired Galaxy Semiconductor, a provider of test data analysis and defect reduction software for the semiconductor industry. With this acquisition, more design, test, and product engineers will now have access to Galaxy’s powerful solutions for maximizing device yields, improving test quality, reducing DPM (defects per million), and enhancing device characterization efforts.

“The acquisition of Galaxy Semiconductor provides a significant opportunity for Mentor to expand the breadth of our overall design-to-silicon product offering,” said Joe Sawicki, vice president and general manager of Mentor Graphics Design-to-Silicon Division. “The combination of Mentor’s Tessent® silicon test products along with Galaxy’s test data analysis products provides the industry with end-to-end solutions that span all aspects of design-for-test, device characterization, yield ramp, and cost-optimized high-quality manufacturing test.”

“The Galaxy team is excited to be a part of Mentor, an EDA industry leader with best-in-class products in design-for-test, design-for-manufacturing and automotive electronics design — all of which are highly complementary to Galaxy’s product line,” said Bertrand Renaud, former chief operating officer for Galaxy Semiconductor. “Through the acquisition, Mentor will be able to expand Galaxy’s worldwide sales and support and accelerate the next-generation solutions, which will provide even greater value to customers.”

Nothing raises more suspicion today: 2015 – 2016 have been exciting years for the GaN power business: 600V GaN is today commercially available, after many ups and downs. And GaN power IC has debuted, opening new market perspectives for GaN companies. According to Yole Développement (Yole), the “More than Moore” market research and strategy consulting company, GaN power business is expected to reach US$280 million in 2021, with an 86% CAGR between 2015 and 2021. The market is driving by emerging applications including power supply for datacenter and telecom – AC fast charger – Lidar – ET – And wireless power.

gan hype circle

“Numerous powerful developments and key collaborations have been announced during this period and confirmed a promising and fast-growing industry,” commented Dr. Hong Lin, Technology & Market Analyst from Yole. Integrated Device Technology (IDT) and Efficient Power Conversion (EPC) – Infineon Technologies and Panasonic – Exagan and XFab – TSMC and GaN Systems for volume production and much more. All collaborations took place within only 2 years, between 2015 and 2016. In parallel Texas Instruments announced a 80V power stage in 2015 and a 600V power stage in 2016. From its side, Visic announced its first GaN product in 2015.

Yole’s analysts propose you to discover the status of the Power GaN industry with a new technology & market analysis titled Power GaN 2016: Epitaxy and Devices, Applications and Technology Trends. This report gives a deep understanding of GaN penetration in different applications (power supply, PV , EV/HEV , UPS , lidar…) and the state-of-the-art GaN power devices. It also review the industrial landscape, market dynamics and market projection.

Up until late 2014, 600V/650V GaN HEMTs’ commercial availability was still questionable, despite some announcements from different players. Fast-forward to 2016 end users can now buy not only low-voltage GaN (<200V) devices from EPC Power, but also high-voltage (600V/650V) components from several players, including Transphorm, GaN Systems, and Panasonic.

In parallel a new start-up, Navitas Semiconductor, announced their GaN power IC in March 2016, followed by Dialog Semiconductors revealing their GaN power IC in August 2016. The idea of bringing GaN from the power semiconductor market to the much bigger analog IC market is of interest to several other players too. For example, EPC Power and GaN Systems are both working on a more integrated solution, and Texas Instruments, a well-established analog IC player, has also been engaged in GaN activities, releasing an 80V power stage and 600V power stage in 2015 and 2016, respectively.

Despite these exciting developments, the GaN power market remains small compared to the gigantic US$335 billion silicon semiconductor market. In fact, according to Yole’s investigation, the GaN power business was less than US$10 million in 2015.

“But before you think twice about GaN, remember that a small market size is not unusual for products just appearing on the market,” commented Dr Hong Lin. Indeed first GaN devices were not commercially available until 2010. According to Yole’s analysts, the most important point to be noticed is the potential of GaN power. Indeed they expect the GaN power business to grow, reaching a market size of around US$300 million in 2021 at a 2016 – 2021 CAGR of 86%. “The current GaN power market is mainly dominated by low voltage (<200V) devices in the forecasted period but the 600V devices should take off,” commented Zhen Zong, Technology & Market Analyst at Yole.

“More than 200 patent applicants are involved in the power GaN industry,” explained KnowMade in its GaN for Power Electronics: Patent Investigation report (KnowMade, August 2015). Such figure is showing the strong interest from power players in the GaN business. The take-off of patenting activity took place in the 2000s with a first wave of patent publications over the 2005-2009 period mainly due to American and Japanese companies. A second wave started in 2010 while first commercial GaN products, collaborations and mergers and acquisitions emerged.

“In the today’s power GaN market, it is crucial to understand the global patent landscape thorough in-depth analyses,” commented Nicolas Baron, CEO & Co-founder of Knowmade. “This approach helps the companies to anticipate the changes, identify and evaluate business opportunities, mitigate risks and make strategic choices.”

Thin Film Electronics ASA (Thinfilm) today announced that it has leased a former Qualcomm-owned manufacturing facility in Silicon Valley and will relocate its current US headquarters and NFC Innovation Center in the first quarter of 2017.

The new location will house Thinfilm’s new high-volume roll-to-roll manufacturing line. Roll-based production will increase Thinfilm’s front-end production capacity to five billion NFC OpenSense and NFC SpeedTap tags per year – the equivalent of up to $680 million in annual revenue. Thinfilm intends to begin ordering line-related equipment immediately.

In the near term, the facility upgrade enables Thinfilm to scale existing sheet-based manufacturing of its NFC (Near Field Communication), EAS (Electronic Article Surveillance), and Sensor Label products. Roll-to-roll production is expected to be operational for EAS by year-end 2017 and for transistor-based products in 2018.

The building, located at 2581 Junction Avenue in San Jose, California, was formerly an operational display fab run by Qualcomm MEMS Technologies, Inc., and was in production until the Spring of 2016. More than $80 million has been invested previously in the 93,000 square-foot facility, which sits on 5.4 acres and features a 22,000+ square foot, Class 10-10,000 cleanroom.

“We’re very excited about the new facility and the role we see it playing in scaling Thinfilm’s manufacturing capabilities, particularly for SpeedTap and OpenSense. Given the growing market demand for NFC smart packaging, it was vital that we secure a facility that enables us to ramp capacity to ultra-high volumes through roll-to-roll production,” said Davor Sutija, Thinfilm’s CEO. “Thinfilm’s NFC smart labels allow brands to address authentication and anti-tampering needs while empowering them to engage with consumers through the simple tap of an Android smartphone. As the digital marketing arena becomes more fragmented, brands see NFC as a way to eliminate intermediaries and connect directly with their customers.”

Thinfilm will immediately start working on tenant improvements within the office-space portions of the facility, and will begin equipment installation by year-end. Occupancy of the new facility is expected in March 2017.

“Advanced technology, infrastructure-rich buildings such as 2581 Junction Avenue come on the market very infrequently. It really is an excellent property,” said Brad Howe, co-CEO of Lowe Enterprises Investors. Lowe Enterprises Investors and its joint venture partner, Vista Investment Group, purchased the property and subsequently leased it to Thinfilm. “The property appears to be an ideal fit for Thinfilm’s operational and strategic needs, and should serve them well for many years to come.”

Thin Film Electronics ASA is a publicly listed Norwegian company with headquarters in Oslo, Norway; product development and production in Linköping, Sweden; product development, production, and business development in San Jose, California, USA; and sales offices in the United States, Hong Kong, and Singapore.

Enormous financial and technology hurdles continue to plague the development of 450mm wafers. Ambitious goals to put 450mm wafers to use have been scaled back.  IC manufacturers are instead maximizing their manufacturing efficiency using 300mm and 200mm wafers.  IC Insights’ Global Wafer Capacity 2016-2020 report shows that worldwide capacity by wafer size was dominated by 300mm wafers in 2015 and is forecast to continue increasing through 2020 (Figure 1).

Figure 1

Figure 1

  • 300mm wafers represented 63.1% of worldwide capacity at the end of 2015 and are forecast to increase to about 68% by the end of 2020.
  • The share of the industry’s monthly wafer capacity represented by 200mm wafers is expected to drop from 28.3% in 2015 to 25.3% in 2020. But, 200mm wafer capacity is predicted to increase every year over the next several years.
  • Capacity for wafers of ≤150mm diameter is forecast to remain relatively flat during the forecast period.

The number of 300mm wafer fabrication facilities in operation is forecast to keep increasing through 2020 (Figure 2). For the most part, 300mm fabs are, and will continue to be, limited to production of high-volume, commodity-type devices like DRAMs and flash memories; image sensors and power management devices; and complex logic and microcomponent ICs with large die sizes; and by foundries, which can fill a 300mm fab by combining wafer orders from many sources.

Figure 2

Figure 2

  • The number of active volume-production 300mm fabs declined for the first time in 2013. A few fabs that were scheduled to open in 2013 were delayed until 2014. In addition, two large 300mm fabs owned by ProMOS closed in 2013.
  • At the end of 2015, there were 95 production-class IC fabs utilizing 300mm wafers (there are numerous R&D IC fabs and a few high-volume fabs around the globe that make “non-IC” products using 300mm wafers, but these are not included in the count).
  • Currently, there are eight 300mm wafer fabs scheduled to open in 2017, which would be the highest number in one year since 2014 when nine were added.
  • By the end of 2020 there are expected to be 22 more fabs in operation, bringing the total number of 300mm fabs used for IC fabrication to 117. The peak number of 300mm fabs may be somewhere around 125. For comparison, the most volume-production 200mm wafer fabs in operation was 210 (in December 2015 there were 148).

New research, led by the University of Southampton, has demonstrated that a nanoscale device, called a memristor, could be used to power artificial systems that can mimic the human brain.

First demonstration of brain-inspired device to power artificial systems. Credit: University of Southampton

First demonstration of brain-inspired device to power artificial systems. Credit: University of Southampton

Artificial neural networks (ANNs) exhibit learning abilities and can perform tasks which are difficult for conventional computing systems, such as pattern recognition, on-line learning and classification. Practical ANN implementations are currently hampered by the lack of efficient hardware synapses; a key component that every ANN requires in large numbers.

In the study, published in Nature Communications, the Southampton research team experimentally demonstrated an ANN that used memristor synapses supporting sophisticated learning rules in order to carry out reversible learning of noisy input data.

Memristors are electrical components that limit or regulate the flow of electrical current in a circuit and can remember the amount of charge that was flowing through it and retain the data, even when the power is turned off.

Lead author Dr Alex Serb, from Electronics and Computer Science at the University of Southampton, said: “If we want to build artificial systems that can mimic the brain in function and power we need to use hundreds of billions, perhaps even trillions of artificial synapses, many of which must be able to implement learning rules of varying degrees of complexity. Whilst currently available electronic components can certainly be pieced together to create such synapses, the required power and area efficiency benchmarks will be extremely difficult to meet -if even possible at all- without designing new and bespoke ‘synapse components’.

“Memristors offer a possible route towards that end by supporting many fundamental features of learning synapses (memory storage, on-line learning, computationally powerful learning rule implementation, two-terminal structure) in extremely compact volumes and at exceptionally low energy costs. If artificial brains are ever going to become reality, therefore, memristive synapses have to succeed.”

Acting like synapses in the brain, the metal-oxide memristor array was capable of learning and re-learning input patterns in an unsupervised manner within a probabilistic winner-take-all (WTA) network. This is extremely useful for enabling low-power embedded processors (needed for the Internet of Things) that can process in real-time big data without any prior knowledge of the data.

Co-author Dr Themis Prodromakis, Reader in Nanoelectronics and EPSRC Fellow in Electronics and Computer Science at the University of Southampton, said: “The uptake of any new technology is typically hampered by the lack of practical demonstrators that showcase the technology’s benefits in practical applications. Our work establishes such a technological paradigm shift, proving that nanoscale memristors can indeed be used to formulate in-silico neural circuits for processing big-data in real-time; a key challenge of modern society.

“We have shown that such hardware platforms can independently adapt to its environment without any human intervention and are very resilient in processing even noisy data in real-time reliably. This new type of hardware could find a diverse range of applications in pervasive sensing technologies to fuel real-time monitoring in harsh or inaccessible environments; a highly desirable capability for enabling the Internet of Things vision.”

Scientists have created a material that could make reading biological signals, from heartbeats to brainwaves, much more sensitive.

Organic electrochemical transistors (OECTs) are designed to measure signals created by electrical impulses in the body, such as heartbeats or brainwaves. However, they are currently only able to measure certain signals.

Now researchers led by a team from Imperial College London have created a material that measures signals in a different way to traditional OECTs that they believe could be used in complementary circuits, paving the way for new biological sensor technologies.

Semiconducting materials can conduct electronic signals, carried by either electrons or their positively charged counterparts, called holes. Holes in this sense are the absence of electrons – the spaces within atoms that can be filled by them.

Electrons can be passed between atoms but so can holes. Materials that use primarily hole-driven transport are called ‘p-type’ materials, and those that use primarily electron-driven transport are called, and ‘n-type’ materials.

An ‘ambipolar’ material is the combination of both types, allowing the transport of holes and electrons within the same material, leading to potentially more sensitive devices. However, it has not previously been possible to create ambipolar materials that work in the body.

The current most sensitive OECTs use a material where only holes are transported. Electron transport in these devices however has not been possible, since n-type materials readily break down in water-based environments like the human body.

But in research published today in Nature Communications, the team have demonstrated the first ambipolar OECT that can conduct electrons as well as holes with high stability in water-based solutions.

The team overcame the seemingly inherent instability of n-type materials in water by designing new structures that prevent electrons from engaging in side-reactions, which would otherwise degrade the device.

These new devices can detect positively charged sodium and potassium ions, important for neuron activities in the body, particularly in the brain. In the future, the team hope to be able to create materials tuned to detect particular ions, allowing ion-specific signals to be detected.

Lead author Alexander Giovannitti, a PhD student under the supervision of Professor Iain McCulloch, from the Department of Chemistry and Centre for Plastic Electronics at Imperial said: “Proving that an n-type organic electrochemical transistor can operate in water paves the way for new sensor electronics with improved sensitivity.

“It will also allow new applications, particularly in the sensing of biologically important positive ions, which are not feasible with current devices. For example, these materials might be able to detect abnormalities in sodium and potassium ion concentrations in the brain, responsible for neuron diseases such as epilepsy.”

Dr. Lingkui Meng, Dr. Yasutomo Segawa, Professor Kenichiro Itami of the JST-ERATO Itami Molecular Nanocarbon Project, Institute of Transformative Bio-Molecules (ITbM) of Nagoya University and Integrated Research Consortium on Chemical Sciences, and their colleagues have reported in the Journal of the American Chemical Society, on the development of a simple and effective method for the synthesis of thiophene-fused PAHs.

Thiophene-fused PAHs are organic molecules composed of multiple aromatic rings including thiophene. Thiophene is a five-membered aromatic ring containing four carbon atoms and a sulfur atom. Thiophene-fused PAHs are known to be one of the most common organic semiconductors and are used in various electronic materials, such as in transistors, organic thin-film solar cells, organic electro-luminescent diodes and electronic devices. More recently, they have found use in wearable devices due to their lightweight and flexibility.

Yellow and gray colors on the molecule represent sulfur and carbon atoms respectively. Thiophene-fused PAHs have found uses as transistors. Credit: ITbM, Nagoya University

Yellow and gray colors on the molecule represent sulfur and carbon atoms respectively. Thiophene-fused PAHs have found uses as transistors. Credit: ITbM, Nagoya University

Thienannulation (thiophene-annulation) reactions, a transformation that makes new thiophene rings via cyclization, leads to various thiophene-fused PAHs. Most conventional thienannulation methods require the introduction of two functional groups adjacent to each other to form two reactive sites on PAHs before the cyclization can take place. Thus, multiple steps are required for the preparation of the substrates. As a consequence, a more simple method to access thiophene-fused PAHs is desirable.

A team led by Yasutomo Segawa, a group leader of the JST-ERATO project, and Kenichiro Itami, the director of the JST-ERATO project and the center director of ITbM, has succeeded in developing a simple and effective method for the formation of various thiophene-fused PAHs. They have managed to start from PAHs that have only one functional group, which saves the effort of installing another functional group, and have performed the thienannulation reactions using elemental sulfur, a readily available low cost reagent. The reactions can be carried out on a multigram scale and can be conducted in a one-pot two-step reaction sequence starting from an unfunctionalized PAH. This new approach can also generate multiple thiophene moieties in a single reaction. Hence, this method has the advantage of offering a significant reduction in the number of required steps and in the reagent costs for thiophene-fused PAH synthesis compared to conventional methods.

The researchers have shown that upon heating and stirring the dimethylformamide solution of arylethynyl group-substituted PAHs and elemental sulfur in air, they were able to obtain the corresponding thiophene-fused PAHs. The arylethynyl group consists of an alkyne (a moiety with a carbon-carbon triple bond) bonded to an aromatic ring. The reaction proceeds via a carbon-hydrogen (C-H) bond cleavage at the position next to the arylethynyl group (called the ortho-position) on PAHs, in the presence of sulfur. As the ortho-C-H bond on the PAH can be cleaved under the reaction conditions, prior functionalization (installation of a functional group) becomes unnecessary.

Arylethynyl-substituted PAHs are readily accessible by the Sonogashira coupling, which is a cross-coupling reaction to form carbon-carbon bonds between an alkyne and a halogen-substituted aromatic compound. The synthesis of thiophene-fused PAHs can also be carried out in one-pot, in which PAHs are subjected to a Sonogashira coupling to form arylethynyl-substituted PAHs, followed by direct treatment of the alkyne with elemental sulfur to induce thienannulation.

“Actually, we coincidentally discovered this reaction when we were testing different chemical reactions to synthesize a new molecule for the Itami ERATO project,” says Yasutomo Segawa, one of the leaders of this study. “At first, most members including myself felt that the reaction may have already been reported because it is indeed a very simple reaction. Therefore, the most difficult part of this research was to clarify the novelty of this reaction. We put in a significant amount of effort to investigate previous reports, including textbooks from more than 50 years ago as well as various Internet sources, to make sure that our reaction conditions had not been disclosed before,” he continues.

The team succeeded in synthesizing more than 20 thiophene-fused PAHs. They also revealed that multiple formations of thiophene rings of PAHs substituted with multiple arylethynyl groups could be carried out all at once. Multiple thiophene-fused PAHs were generated from three-fold and five-fold thienannulations, which generated triple thia[5]helicene (containing three thiophenes) and pentathienocorannulene (containing five thiophenes), respectively. The pentathienocorannulene was an unprecedented molecule that was synthesized for the first time.

“I was extremely happy when I was able to obtain the propeller-shaped triple thia[5]helicene and hat-shaped pentathienocorannulene, because I have always been aiming to synthesize exciting new molecules since I joined Professor Itami’s group,” says Lingkui Meng, a postdoctoral researcher who mainly conducted the experiments. “We had some problems in purifying the compounds but we were delighted when we obtained the crystal structures of the thiophene compounds, which proved that the desired reactions had taken place.”

“The best part of this research for me is to discover that our C-H functionalization strategy on PAHs could be applied to synthesize structurally beautiful molecules with high functionalities,” says Segawa. “The successful synthesis of a known high-performance organic semiconductive molecule, (2,6-bis(4-n-octylphenyl)- dithieno[3,2-b:2?,3?-d]thiophene, from a relatively cheap substrate opens doors to access useful thiophene compounds in a rapid and cost-effective manner.”

“We hope that ongoing advances in our method may lead to the development of new organic electronic devices, including semiconductor and luminescent materials,” say Segawa and Itami. “We are considering the possibilities to make this reaction applicable for making useful thiophene-fused PAHs, which would lead to the rapid discovery and optimization of key molecules that would advance the field of materials science.”

For more than a decade, engineers have been eyeing the finish line in the race to shrink the size of components in integrated circuits. They knew that the laws of physics had set a 5-nanometer threshold on the size of transistor gates among conventional semiconductors, about one-quarter the size of high-end 20-nanometer-gate transistors now on the market.

Some laws are made to be broken, or at least challenged.

A research team led by faculty scientist Ali Javey at the Department of Energy’s Lawrence Berkeley National Laboratory (Berkeley Lab) has done just that by creating a transistor with a working 1-nanometer gate. For comparison, a strand of human hair is about 50,000 nanometers thick.

This is a schematic of a transistor with a molybdenum disulfide channel and 1-nanometer carbon nanotube gate. Credit: Sujay Desai/Berkeley Lab

This is a schematic of a transistor with a molybdenum disulfide channel and 1-nanometer carbon nanotube gate. Credit: Sujay Desai/Berkeley Lab

“We made the smallest transistor reported to date,” said Javey, a lead principal investigator of the Electronic Materials program in Berkeley Lab’s Materials Science Division. “The gate length is considered a defining dimension of the transistor. We demonstrated a 1-nanometer-gate transistor, showing that with the choice of proper materials, there is a lot more room to shrink our electronics.”

The key was to use carbon nanotubes and molybdenum disulfide (MoS2), an engine lubricant commonly sold in auto parts shops. MoS2 is part of a family of materials with immense potential for applications in LEDs, lasers, nanoscale transistors, solar cells, and more.

The findings will appear in the Oct. 7 issue of the journal Science. Other investigators on this paper include Jeff Bokor, a faculty senior scientist at Berkeley Lab and a professor at UC Berkeley; Chenming Hu, a professor at UC Berkeley; Moon Kim, a professor at the University of Texas at Dallas; and H.S. Philip Wong, a professor at Stanford University.

The development could be key to keeping alive Intel co-founder Gordon Moore’s prediction that the density of transistors on integrated circuits would double every two years, enabling the increased performance of our laptops, mobile phones, televisions, and other electronics.

“The semiconductor industry has long assumed that any gate below 5 nanometers wouldn’t work, so anything below that was not even considered,” said study lead author Sujay Desai, a graduate student in Javey’s lab. “This research shows that sub-5-nanometer gates should not be discounted. Industry has been squeezing every last bit of capability out of silicon. By changing the material from silicon to MoS2, we can make a transistor with a gate that is just 1 nanometer in length, and operate it like a switch.”

When ‘electrons are out of control’

Transistors consist of three terminals: a source, a drain, and a gate. Current flows from the source to the drain, and that flow is controlled by the gate, which switches on and off in response to the voltage applied.

Both silicon and MoS2 have a crystalline lattice structure, but electrons flowing through silicon are lighter and encounter less resistance compared with MoS2. That is a boon when the gate is 5 nanometers or longer. But below that length, a quantum mechanical phenomenon called tunneling kicks in, and the gate barrier is no longer able to keep the electrons from barging through from the source to the drain terminals.

“This means we can’t turn off the transistors,” said Desai. “The electrons are out of control.”

Because electrons flowing through MoS2 are heavier, their flow can be controlled with smaller gate lengths. MoS2 can also be scaled down to atomically thin sheets, about 0.65 nanometers thick, with a lower dielectric constant, a measure reflecting the ability of a material to store energy in an electric field. Both of these properties, in addition to the mass of the electron, help improve the control of the flow of current inside the transistor when the gate length is reduced to 1 nanometer.

Once they settled on MoS2 as the semiconductor material, it was time to construct the gate. Making a 1-nanometer structure, it turns out, is no small feat. Conventional lithography techniques don’t work well at that scale, so the researchers turned to carbon nanotubes, hollow cylindrical tubes with diameters as small as 1 nanometer.

They then measured the electrical properties of the devices to show that the MoS2 transistor with the carbon nanotube gate effectively controlled the flow of electrons.

“This work demonstrated the shortest transistor ever,” said Javey, who is also a UC Berkeley professor of electrical engineering and computer sciences. “However, it’s a proof of concept. We have not yet packed these transistors onto a chip, and we haven’t done this billions of times over. We also have not developed self-aligned fabrication schemes for reducing parasitic resistances in the device. But this work is important to show that we are no longer limited to a 5-nanometer gate for our transistors. Moore’s Law can continue a while longer by proper engineering of the semiconductor material and device architecture.”