Yearly Archives: 2016

New levels of performance of electronics technology have been enabled by flip-chip technology, fueling the growth of global markets for semiconductors, electronic devices, and a host of industrial and consumer products. BCC Research reveals in its new report that increasing complexity of the architecture of chip design and fabrication is spurring this market’s exponential growth rate.

Semiconductor devices like integrated circuits (ICs) are connected to external circuitry using flip-chip technology by means of solder bumps deposited onto chip pads. Traditionally, devices are connected from substrates or other active components using wire bonds. More specifically, flip chip is directly attached to a board, substrate, or carrier by various conductive methods called bumping. The chip is “bumped” by laying it on a substrate and thus uses a “face down” process. Wire bonding, the older methodology gradually being replaced by flip chip, used a “face up” process.

The global market for flip-chip technology, which totaled $24.9 billion in 2015, should reach $27.2 billion and $41.4 billion in 2016 and 2021, respectively, increasing at a five-year compound annual growth rate (CAGR) of 8.8%. As a segment, copper (Cu) pillar bumping process owned the largest market share in 2015, and should retain its position during the forecast period. The Cu pillar bumping process is expected to reach $21.2 billion by 2021, reflecting a five-year CAGR of 16.7%.

The flip-chip market is a technology-driven market. Manufacturers are focusing on developing new technologies for the bumping process, which in turn is increasing the demand for raw materials required for manufacturing. This leads to aggressive growth in this industry among raw material suppliers. The many advantages over other packaging methods such as reliability, size, flexibility, performance, and cost are the prime factors driving the growth of the flip-chip market. The market is also driven by availability of flip-chip raw materials, equipment, and services.

Demand for flip chips with controlled collapse chip connection (C4) technology has grown significantly due to the shrinking size of chips and demand for more sophisticated structures. Improved thermal heat transfer and performance at higher frequencies also drive the market for flip chips.

Flip-chip bumping extensively uses various wafer bumping technologies, such as lead-free solder, gold stud bumping, and so forth. Copper bumping accounts for the major share of the market. Tin-lead (Sn-Pb) solder is expected to show a highly negative growth rate. Government initiatives to ban toxic substances have impacted its market heavily.

“The Cu pillar bumping process provides better performance, low cost, and is a nontoxic process,” says BCC Research analyst Sinha Guarav. “In addition, increasing demand for communication devices and other computing devices is also expected to have a positive impact on the Cu pillar bumping market.”

Flip-Chip Technologies and Global Markets (SMC089B) analyzes the evolution, architecture, and value chain of flip-chip technologies. Global market drivers and trends, with data from 2015, 2016, and projections of CAGRs through 2021 also are provided.

BCC Research is a publisher of market research reports that provide organizations with intelligence to drive smart business decisions.

Although liquid-crystal display (LCD) has dominated mobile phone displays for more than 15 years, organic light-emitting diode (OLED) display technology is set to become the leading smartphone display technology in 2020, according to IHS Markit (Nasdaq: INFO). AMOLED displays with a low-temperature polysilicon (LTPS) backplane will account for more than one-third (36 percent) of all smartphone displays shipped in 2020, becoming the most-used display technology in smartphone displays, surpassing a-Si (amorphous silicon) thin-film transistor (TFT) LCD and LTPS TFT LCD displays.

“While OLED is currently more difficult to manufacture, uses more complicated materials and chemical processes, and requires a keen focus on yield-rate management, it is an increasingly attractive technology for smartphone brands,” said David Hsieh, senior director, IHS Markit. “OLED displays are not only thinner and lighter than LCD displays, but they also boast better color performance and enable flexible display form factors that can lead to more innovative design.”

Samsung Electronics has already adopted OLED displays in its smartphone models, and there is also increasing demand from Chinese Huawei, OPPO, Vivo, Meizu and other smartphone brands. Apple is also now widely expected to use OLED displays in its upcoming iPhone models.

At one time, OLED displays were entirely glass-based and in terms of performance, there was little difference between LCD and OLED displays. Now, flexible OLED displays made from thinner and lighter plastic are enabled and have drawn Apple’s attention. “Apple’s upcoming adoption of OLED displays will be a milestone for OLED in the display industry,” Hsieh said.

Samsung Display, LG Display, Sharp, JDI, BOE, Tianma, GVO, Truly, and CSOT are also starting to ramp up their AMOLED manufacturing capacities and devote more resources to technology development. Samsung Display’s enormous sixth-generation A3 AMOLED fab, for example, will enable even more AMOLED displays to reach the market. Global AMOLED manufacturing capacity will increase from 5 million square meters in 2014 to 30 million square meters in 2020.

“Many display manufacturers were investing in LTPS LCD, thinking it would overtake a-Si technology,” Hsieh said. “However, many of the fabs under construction, especially in China, have had to change their plans to add OLED evaporation and encapsulation tools, because OLED penetration has been more rapid than previously expected.”

Applied Materials, Inc. today announced the appointment of Judy Bruner to serve on its Board of Directors. Ms. Bruner has also been appointed to serve as a member of the Audit Committee of the Board.

“As a well-respected chief financial officer with deep experience in the global high-tech industry, Judy will be an asset to Applied Materials’ Board of Directors,” said Wim Roelandts, chairman of the board of Applied Materials. “Having built her career in increasingly sophisticated finance roles across some of Silicon Valley’s top hardware companies, she is a welcome addition to our team of directors and will be a valued member of our Audit Committee.”

Judy Bruner served as Executive Vice President, Administration and Chief Financial Officer of SanDisk Corporation, a supplier of flash storage products, from June 2004 until its acquisition by Western Digital in May 2016. Previously, she was Senior Vice President and Chief Financial Officer of Palm, Inc., a provider of handheld computing and communications solutions, from September 1999 until June 2004. Prior to Palm, Inc., Ms. Bruner held financial management positions at 3Com Corporation, Ridge Computers and Hewlett-Packard Company. She currently serves as a member of the board of directors of Brocade Communications Systems, Inc. and a member of the board of trustees of the Computer History Museum.

The old rules don’t necessarily apply when building electronic components out of two-dimensional materials, according to scientists at Rice University.

The Rice lab of theoretical physicist Boris Yakobson analyzed hybrids that put 2-D materials like graphene and boron nitride side by side to see what happens at the border. They found that the electronic characteristics of such “co-planar” hybrids differ from bulkier components.

Hybrids of two-dimensional materials like the graphene-molybdenum disulfide illustrated here have electronic properties that don't follow the same rules as their 3-D cousins, according to Rice University researchers. The limited direct contact between the two materials creates an electric field that greatly increases the size of the p/n junction. Credit: Henry Yu/Rice University

Hybrids of two-dimensional materials like the graphene-molybdenum disulfide illustrated here have electronic properties that don’t follow the same rules as their 3-D cousins, according to Rice University researchers. The limited direct contact between the two materials creates an electric field that greatly increases the size of the p/n junction. Credit: Henry Yu/Rice University

Their results appear this month in the American Chemical Society journal Nano Letters.

Shrinking electronics means shrinking their components. Academic labs and industries are studying how materials like graphene may enable the ultimate in thin devices by building all the necessary circuits into an atom-thick layer.

“Our work is important because semiconductor junctions are a big field,” Yakobson said. “There are books with iconic models of electronic behavior that are extremely well-developed and have become the established pillars of industry.

“But these are all for bulk-to-bulk interfaces between three-dimensional metals,” he said. “Now that people are actively working to make two-dimensional devices, especially with co-planar electronics, we realized that the rules have to be reconsidered. Many of the established models utilized in industry just don’t apply.”

The researchers led by Rice graduate student Henry Yu built computer simulations that analyze charge transfer between atom-thick materials.

“It was a logical step to test our theory on both metals and semiconductors, which have very different electronic properties,” Yu said. “This makes graphene, which is a metal — or a semimetal, to be precise — molybdenum disulfide and boron nitride, which are semiconductors, or even their hybrids ideal systems to study.

“In fact, these materials have been widely fabricated and used in the community for almost a decade, which makes analysis of them more appreciable in the field. Furthermore, both hybrids of graphene-molybdenum disulfide and graphene-boron nitride have been successfully synthesized recently, which means our study has practical meaning and can be tested in the lab now,” he said.

Yakobson said 3-D materials have a narrow region for charge transfer at the positive and negative (or p/n) junction. But the researchers found that 2-D interfaces created “a highly nonlocalized charge transfer” — and an electric field along with it — that greatly increased the junction size. That could give them an advantage in photovoltaic applications like solar cells, the researchers said.

The lab built a simulation of a hybrid of graphene and molybdenum disulfide and also considered graphene-boron nitride and graphene in which half was doped to create a p/n junction. Their calculations predicted the presence of an electric field should make 2-D Schottky (one-way) devices like transistors and diodes more tunable based on the size of the device itself.

How the atoms line up with each other is also important, Yakobson said. Graphene and boron nitride both feature hexagonal lattices, so they mesh perfectly. But molybdenum disulfide, another promising material, isn’t exactly flat, though it’s still considered 2-D.

“If the atomic structures don’t match, you get dangling bonds or defects along the borderline,” he said. “The structure has consequences for electronic behavior, especially for what is called Fermi level pinning.”

Pinning can degrade electrical performance by creating an energy barrier at the interface, Yakobson explained. “But your Schottky barrier (in which current moves in only one direction) doesn’t change as expected. This is a well-known phenomenon for semiconductors; it’s just that in two dimensions, it’s different, and in this case may favor 2-D over 3-D systems.”

Yakobson said the principles put forth by the new paper will apply to patterned hybrids of two or more 2-D patches. “You can make something special, but the basic effects are always at the interfaces. If you want to have many transistors in the same plane, it’s fine, but you still have to consider effects at the junctions.

“There’s no reason we can’t build 2-D rectifiers, transistors or memory elements,” he said. “They’ll be the same as we use routinely in devices now. But unless we develop a proper fundamental knowledge of the physics, they may fail to do what we design or plan.”

Worldwide semiconductor capital spending is projected to decline 0.7 percent in 2016, to $64.3 billion, according to Gartner, Inc. (see Table 1). This is up from the estimated 2 percent decline in Gartner’s previous quarterly forecast.

“Economic instability, inventory excess, weak demand for PC’s, tablets, and mobile products in the past three years has caused slow growth for the semiconductor industry. This slowdown in electronic product demand has driven semiconductor device manufacturers to be conservative in increasing production,” said David Christensen, senior research analyst at Gartner. “Looking ahead, it appears the second half of 2016 may see improved demand. However, following Brexit, semiconductor inventory levels may rise in the third and fourth quarters, which could lead to reduced production volumes.”

Table 1

Worldwide Semiconductor Capital Spending and Equipment Spending Forecast, 2015-2018 (Millions of Dollars)

2015

2016

2017

2018

Semiconductor Capital Spending ($M)

64,750.8

64,278.3

66,010.5

68,523.7

Growth (%)

0.3

-0.7

2.7

3.8

Wafer-Level Manufacturing Equipment ($M)

33,248.1

32,890.9

34,842.2

37,704.3

Growth (%)

-1.1

-1.1

5.9

8.2

Wafer Fab Equipment ($M)

31,485.4

31,071.8

32,862.1

35,491.5

Growth (%)

-1.3

-1.3

5.8

8.0

Wafer-Level Packaging and Assembly Equipment ($M)

1,762.7

1,819.1

1,980.1

2,212.9

Growth (%)

4.1

3.2

8.9

11.8

Source: Gartner (July 2016)

The PC, ultramobile (tablet) and smartphone production forecast for the second half of 2016 has been lowered from 2015, as the industry slowdown continues. These reductions have resulted in a forecasted 3 percent decline for the semiconductor market. Memory revenue growth for 2016 is also revised downward compared with the previous forecast, due to a weaker pricing outlook.

“While currency exchange rates are another reason for the ongoing revenue decrease, the aggressive pursuit of semiconductor manufacturing capability by the Chinese government and related investment companies is becoming a major factor,” said Mr. Christensen. “This will dramatically affect the competitive landscape of the global semiconductor manufacturing in the next few years as China becomes a major market for semiconductor usage and manufacturing.”

This research is produced by Gartner’s Semiconductor Manufacturing program. This research program, which is part of the overall semiconductor research group, provides a comprehensive view of the entire semiconductor industry, from manufacturing to device and application market trends. Additional analysis on the outlook for the market can be found at “Forecast: Semiconductor Capital Spending, Worldwide, 2Q16 Update.”

Today SEMI announced registration opened for Europe’s largest electronics manufacturing exhibition, SEMICON Europa (25-26 October) in Grenoble. Featuring over 100 hours of technical sessions and presentations, SEMICON Europa includes semiconductor equipment and materials as well as additional topics, such as Imaging, Power Electronics, and Advanced Packaging. Newly restructured Fab Management Forum and a new flexible hybrid electronics conference, 2016FLEX.  Innovation Village returns, focused on startups and emerging technologies. Register now to take advantage of early-bird pricing for conferences, forums, and select sessions.

SEMICON Europa’s Fab Manager Forum has expanded to become the Fab Management Forum, to address a wider audience – with best practices for management, organization, and manufacturing in new wafer fabs.  SEMICON Europa’s Advanced Packaging Forum is more important than ever in the industry’s efforts to shrink devices to smaller form factors, lower power consumption, and flexible designs.

The new flexible hybrid electronics conference 2016FLEX Europe will debut at SEMICON Europa, replacing the Plastics Electronics Conference.  Program topics focus on the integration of silicon electronics onto flexible and printed substrates in a wide range of applications including: automotive, medical, wearables, IoT and others.

SEMICON Europa rotates between Grenoble (France) and Dresden (Germany), two of Europe’s largest electronic clusters. With the support of public and private stakeholders across Europe, the new SEMICON Europa enables exhibitors to reach new audiences and business partners and take full advantage of the strong microelectronic clusters in Europe. Over 400 exhibitors at SEMICON Europa represent the suppliers of Europe’s leading electronics companies. Learn more about exhibiting at SEMICON Europa.

To learn more about SEMICON Europa (exhibition or registration), please visit: www.semiconeuropa.org/en. Register now to secure your space and take advantage of SEMICON Europa’s early-bird pricing and exhibition opportunities.

Despite strong double-digit percentage increases in annual unit shipments, semiconductor sensor sales growth has become uncharacteristically lethargic because of steep price erosion in several major product categories. Strong unit demand is being fueled by new wearable systems, greater automation in vehicles, and the much-anticipated Internet of Things (IoT), but sharply falling average selling prices (ASPs) on accelerometers, gyroscope chips, and magnetic-field measuring devices are capping annual growth of total sensor revenues in the low- to mid-single digit range, based on data in IC Insights’ 2016 O-S-D Report—A Market Analysis and Forecast for Optoelectronics, Sensors/Actuators, and Discretes.

The 2016 O-S-D Report shows worldwide dollar-volume revenues for sensors rising by a compound annual growth rate (CAGR) of 5.3% between 2015 and 2020 compared to an 8.9% annual rate in the last five years. In contrast, total sensor unit shipments are expected to climb by a CAGR of 12.4% in the five-year forecast period compared to a blistering 20.5% rate of increase in the 2010-2015 period, when new sensing, navigation, and automated embedded control functions in smartphones drove up strong growth along with steady increases in automotive and industrial applications.

Despite recent years of weak sales growth—just 1% in 2015 to $6.4 billion—the sensor market is expected to end this decade with 10 consecutive years of record-high revenues and reach $8.3 billion in 2020 (Figure 1). Unit shipments of sensors have reached record high levels each year since the beginning of the last decade—even in the 2009 downturn year, when worldwide unit volume grew 9% while sensor revenues dropped 3%. Record sensor shipments are expected to continue for another five years, reaching 28.9 billion units in 2020, according to the 360-page 2016 O-S-D Report, which contains a detailed five-year forecast of sales, unit volume, and ASPs for more than 30 individual product types and device categories in optoelectronics, sensors/actuators, and discretes.

Figure 1

Figure 1

Competition between suppliers and requirements for low-cost sensors in new high-volume applications drove down ASPs from about $0.66 in 2010 to $0.40 in 2015.  The need to squeeze more sensing solutions into wearable systems, far-flung IoT-connected applications, and multi-sensor packages for increased accuracy and multi-dimensional measurements is exerting more pricing pressure in the market, concludes the 2016 O-S-D Report.   The report’s forecast shows sensor ASPs dropping by a CAGR of  6.3% in the next five years to only $0.29.

Total sensor sales are expected to grow by about 3% in 2016 to $6.6 billion with worldwide shipments rising 13% to nearly 18.2 billion units this year.  Sales of sensors made with microelectromechanical systems (MEMS) technology (i.e., accelerometers, gyroscope devices, and pressure sensors, including microphone chips)—are expected to grow by 4% in 2016 to $4.8 billion with unit shipments increasing 10% to 7.6 billion.  The 2016 O-S-D Report projects MEMS-based sensor sales rising by a CAGR of 5.5% in the next five years to $6.1 billion in 2020 with unit shipments growing by an annual rate of 11.9% to nearly 13.4 billion.  ASPs for MEMS-based sensors are expected to decline by a CAGR of -5.7% to $0.45 in 2020 from $0.61 in 2015, according to the annual O-S-D Report.

North America-based manufacturers of semiconductor equipment posted $1.71 billion in orders worldwide in June 2016 (three-month average basis) and a book-to-bill ratio of 1.00, according to the June Equipment Market Data Subscription (EMDS) Book-to-Bill Report published today by SEMI.  A book-to-bill of 1.00 means that $100 worth of orders were received for every $100 of product billed for the month.

SEMI reports that the three-month average of worldwide bookings in June 2016 was $1.71 billion. The bookings figure is 2.1 percent lower than the final May 2016 level of $1.75 billion, and is 12.9 percent higher than the June 2015 order level of $1.52 billion.

The three-month average of worldwide billings in June 2016 was $1.71 billion. The billings figure is 7.0 percent higher than the final May 2016 level of $1.60 billion, and is 10.2 percent higher than the June 2015 billings level of $1.55 billion.

“Although order activity slowed for the most recent month,” said Denny McGuirk, president and CEO of SEMI. “Billings activity for equipment companies based in North America are at their highest level since February 2011.”

The SEMI book-to-bill is a ratio of three-month moving averages of worldwide bookings and billings for North American-based semiconductor equipment manufacturers. Billings and bookings figures are in millions of U.S. dollars.

Billings
(3-mo. avg)

Bookings
(3-mo. avg)

Book-to-Bill
January 2016

$1,221.2

$1,310.9

1.07
February 2016

$1,204.4

$1,262.0

1.05
March 2016

$1,197.6

$1,379.2

1.15
April 2016

$1,460.2

$1,595.4

1.09
May 2016 (final)

$1,601.5

$1,750.5

1.09
June 2016 (prelim)

$1,714.0

$1,713.2

1.00

Source: SEMI (www.semi.org), July 2016

For more than six decades, the annual IEEE International Electron Devices Meeting (IEDM) has been the world’s largest and most influential forum for technologists to unveil breakthroughs in transistors and related micro/nanoelectronics devices.

That tradition continues this year with a few new twists, including a supplier exhibition and a later paper-submission deadline (August 10) of a final, four-page paper. Accepted papers will appear in the proceedings without any changes. This streamlined process will ensure that even as the pace of innovation in electronics quickens, IEDM remains the place to learn about the latest and most important developments.

The 62nd annual IEDM will be held in San Francisco December 3 – 7, 2016, beginning with a weekend program of 90-minute tutorials and all-day Short Courses taught by industry leaders and world experts in their respective technical disciplines. These weekend events will precede a technical program of some 220 papers and a rich offering of other events including thought-provoking plenary talks, spirited evening panels, special focus sessions on topics of great interest, IEEE awards and an event for entrepreneurs sponsored by IEDM and IEEE Women in Engineering.

“The industry is moving forward at an accelerated pace to match the increasing complexity of today’s world, and a later submission deadline enables us to shorten the time between when results are achieved in the lab and when they are presented at the IEDM,” said Dr. Martin Giles, IEDM 2016 Publicity Chair, Intel Fellow, and Director of Transistor Technology Variation in Intel’s Technology and Manufacturing Group.

Tibor Grasser, IEDM 2016 Exhibits Chair, IEEE Fellow and Head of the Institute for Microelectronics at TU Wien, added, “We have decided to have a supplier exhibition in conjunction with the technical program this year, as an added way to provide attendees with the knowledge and information they need to advance the state-of-the-art.”

Here are some of the noteworthy events that will take place at this year’s IEDM:

Special Focus Sessions

  • Wearable Electronics and Internet of Things
  • Quantum Computing
  • System-Level Impact of Power Devices
  • Ultra-High-Speed Electronics

90-Minute Tutorials – Saturday, Dec. 3

A program of 90-minute tutorial sessions on emerging technologies will be presented by experts in the fields, bridging the gap between textbook-level knowledge and leading-edge current research. Advance registration is recommended.

  • The Struggle to Keep Scaling BEOL, and What We Can Do Next, Rod Augur, Distinguished Member of the Technical Staff, GLOBALFOUNDRIES
  • Electronic Circuits and Architectures for Neuromorphic Computing Platforms, Giacomo Indiveri, Univ. of Zurich and ETH Zurich
  • Physical Characterization of Advanced Devices, Robert Wallace, Univ. Texas at Dallas
  • Present and Future of FEOL Reliability—from Dielectric Trap Properties to Reliable Circuit Operation, Ben Kaczer, Principal Scientist, imec
  • Spinelectronics: From Basic Phenomena to Magnetoresistive Memory (MRAM) Applications, Bernard Dieny, Chief Scientist, Spintec CEA
  • Technologies for IoT and Wearable Applications, Including Advances in Cost-Effective and Reliable Embedded Non-Volatile Memories, Ali Keshavarzi, Vice President of R&D, Cypress Semiconductor

Short Courses – Sunday, Dec. 4

The Short Courses provide the opportunity to learn about important areas and developments, and to benefit from direct contact with world experts. Advance registration is recommended.

  • Technology Options at the 5-Nanometer Node, organized by An Steegen and Dan Mocuta of imec (Sr. Vice President of Technology Development/Director of Logic Device and Integration, respectively)
  • Design/Technology Enablers for Computing Applications, organized by John Chen, Vice President of Technology and Foundry Management, NVIDIA

Plenary Presentations – Monday, Dec. 5

  • Memory Scaling – Challenges and Opportunities, Seok-Hee Lee, Executive Vice President and Head of DRAM Product and Technology, Hynix
  • Brain-Inspired Computing, Dharmendra S. Modha, IBM Fellow and Chief Scientist for Brain-Inspired Computing, IBM
  • Differentiating Technologies and Novel Opportunities for the Future Internet of Everything: the Quest for Power Efficiency, Marie-Noëlle Semeria, CEO, Leti

Evening Panel Session – Tuesday evening, Dec. 6

The IEDM offers attendees two evening sessions where experts give their views on important industry topics. Audience participation is encouraged to foster an open and vigorous exchange of ideas.

  • How Will the Semiconductor Industry Change to Enable 50 Billion Connected Devices? Moderator: Prof. Aaron Thean, University of Singapore
  • Challenges and Opportunities for Neuromorphic and Machine Learning, Moderator: Marc Duranton, Sr. Member of the Embedded Computing Lab, CEA

Entrepreneurs Lunch – Wednesday, Dec. 7

Jointly sponsored by IEDM and IEEE Women in Engineering, the Entrepreneurs Lunch will feature Vamsee Pamula, co-founder of Baebies, Inc. a company developing digital microfluidics technology for newborn screening and pediatric testing. Pamula co-founded Baebies in 2014, following the sale of a predecessor microfluidics company that he also co-founded – Advanced Liquid Logic – to Illumina, Inc.

Vamsee has years of experience with digital microfluidics. He has served as Principal Investigator on several National Institutes of Health-funded projects, and has led many talks and published more than 60 articles, five book chapters and a book on the topic. He has more than 200 issued and pending patents, a PhD in Electrical and Computer Engineering from Duke University, and also serves as Adjunct Professor there.

Late-News Deadline

A very limited number of Late News Papers will be accepted, focusing on very recent developments, with a submission deadline of September 12. The submission format is the same as for regular papers.

Further information about IEDM

For registration and other information, visit www.ieee-iedm.org.

As the popularity and penetration of wearable and mobile devices increase, so too will demand for innovative flexible displays. In fact, revenue from flexible displays is expected to increase more than 300 percent, from just $3.7 billion in 2016 to $15.5 billion in 2022. Flexible displays will comprise 13 percent of total display market revenue in 2020, according to IHS Inc. (NYSE: IHS).

Samsung Electronics and LG Electronics launched the first smartphones with flexible active-matrix organic light-emitting diode (AMOLED) displays in 2013, and both companies continue to adapt flexible AMOLED displays for their smartphones, smartwatches and fitness trackers. Inspired by these successes, other mobile manufacturers are now developing their own flexible-display devices.

“The varieties of flexible displays include screens that are bendable, curved and edge-curved, but fully foldable form factors are expected within the next two years,” said Jerry Kang, principal analyst of display research for IHS Technology. “Only a few suppliers — including Samsung Display, LG Display, E-ink and Futaba — are now regularly supplying flexible displays to the market. However, many more panel makers are now attempting to build flexible display capacity, leveraging the latest AMOLED display technology.”

According to the IHS Flexible Display Market Tracker, flexible displays are primarily used in smartphones and smartwatches in 2016; however, use in other applications, including tablet PCs, near-eye virtual reality devices, automotive monitors and OLED TVs is expected by 2022. “Consumer device manufacturers will eventually need to innovate their conventionally designed flat, rectangular form-factors to make way for the latest curved, foldable and rollable screens,” Kang said.

Flex_Display_Chart_IHS