Measuring metals, dielectrics, resists and CDs in advanced packaging

A new system combines acoustic, optical and reflectometric techniques to enable measurement of metals, dielectrics, resists and critical dimensions on a single platform.

BY CHEOLKYU KIM, Director of Metrology Product Management, Rudolph Technologies, Inc.

Rapid growth in the mobile device market is generating demand for advanced packaging solutions with higher levels of system integration and increased I/Os and functionality. This demand is driving 2.5D/3D integration of IC devices, which in turn requires sophisticated packaging technologies. Among various approaches, fan-out is gaining traction as outsourced semiconductor assembly and test (OSAT) houses and wafer foundries roll out their own technologies. As illustrated in FIGURE 1, the adoption of fan-out technology accelerated significantly in 2016, and is projected to reach $2.5 billion by 2021, a more than 10X increase from 2015.

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First generation “core” fan-out was geared toward mobile applications and had RDL lines that were typically 10/10μm (line/space) and larger. Second generation HDFO processes, which were developed to integrate multiple chips in a single package, use more RDL lines at smaller width and tighter pitch, down to 2/2μm and smaller. Growth in HDFO accelerated with the entry of Apple and TSMC in 2016 and accounts for the bulk of the fan-out growth projected through 2021 [2-4].

As design rules for HDFO approach those of front-end processes, so too will requirements for process control and, in consequence, the need for more accurate and repeatable metrology. Until now, manufacturers have characterized metal films, such as RDL and under bump metallization (UBM), using semi-automated measurement tools, such as contact profilometers, which are easy to use and relatively inexpensive. However, these tools are not the best solution for measuring a variety of products with varying topographies in high volume production.

High Density Fan-Out process control

HDFO processes include one or more RDL, the number depending on the application. Like front-end processes, HDFO processes use additive and subtractive technol- ogies to create patterns of conductive metal lines isolated by dielectric materials. As RDL lines become smaller, controlling line resistance with appropriate dimensional control has become essential. For an RDL process, the most important parameters to monitor are dielectric thickness, Cu seed layer thickness, Cu thickness and line width (CD). In general, the process must operate inside a window that varies within 10% of the target value. This, in turn, requires measurement tools with a gauge capability (3σ repeatability + reproducibility) of 10% of the variability, or 1% of the target value. In addition to delivering accuracy and repeatability, the metrology system must be able to operate on product wafers and, therefore, 1) be able to measure test structures smaller than 50μm, 2) be non contact/non-destructive/ non-contaminating, 3) be fast enough to support high volume production and 4) be able to handle the significant surface topography and substrate/wafer warpage that are induced by the HDFO process.

As shown schematically in FIGURE 2, the metrology system described here (MetaPULSE® AP, Rudolph Technologies), combines picosecond ultrasonic laser sonar (PULSETM), automated optical microscopy and reflectometry to meet all the requirements for RDL process control in a single system. The acoustic technique, well proven and widely accepted for metal film metrology in front-end applications, is a first principle technology that provides accurate measurements of metal film thickness for UBM and RDL.

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Measurements of RDL thickness with this technique on dense line arrays, pads and bumps have shown excellent correlation to cross sectional scanning electron microscope (X-SEM) results. The precision and gage capability of the technology have been validated down to 2μm and meet OSAT and foundry RDL roadmap requirements.

The integration of a high-resolution reflectometer provides accurate measurements of dielectric and resist thickness, ranging from a few 1000Å to 60μm, on product wafers. The incorporation of an automated optical microscope/high-resolution camera provides gage-capable CD measurements. CD measurements can be made simultaneously with thickness measurements. The addition of optical CD measurements and reflectometer-based transparent film thickness measurements to the acoustic platform provides an efficient and comprehensive in-line RDL metrology solution that eliminates the need to route wafers to multiple measurement tools.

PULSE acoustic thickness measurements on opaque films

FIGURE 3 illustrates the principles of the PULSE acoustic measurement technology. An extremely short laser pulse is focused onto a small spot on the sample surface where the energy of the laser pulse is absorbed by the film surface. This causes a sudden increase of surface temperature, and rapid thermal expansion launches a sound wave on the surface that travels into the film. When the sound wave reaches an interface with an underlying film, it is partially reflected back to the surface as an echo. Upon arrival at the surface, the echo causes a change in optical reflectivity, which is detected to measure the round-trip travel time of the sound wave. Film thickness can be calculated from the travel time of the sound wave and the speed of sound in the material. Some of the energy from the original sound wave is transmitted through the interface. In a multi-layered stack, the progressing sound wave returns a distinct echo from each interface. An analysis of the round-trip travel time for each successive echo permits the calculation of the thickness of each layer. Typical data acquisition times vary from 1s to 4s per site. Repeatability is < 0.1% of target thickness, meeting the 10% GR&R requirement. FIGURE 4 shows the correlation between X-SEM and PULSE measurements for RDL in the 1.25μm-1.5μm thickness range. The excellent correlation clearly demonstrates the accuracy of PULSE thickness measurements.

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Reflectometer thickness measurements on transparent films

FIGURE 5 (left) demonstrates the strong correspondence between a measured reflectometer signal and a model fitted curve for 5μm polyimide on Si. The figure also shows the correlation between reflectometer measurements and a fab reference metrology tool. The excellent correlation with the reference tool confirms the accuracy of reflectometer measurements. Data collection time for reflectometer measurements is typically less than 1s. The reflectometer has excellent sensitivity with Å level resolution and gage-capable R&R.

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Automated optical CD measurements

Using the optical microscope/ high resolution camera system, users can define multiple regions of interest (ROI) for CD measurements, including single line and multi-line arrays. The built-in measurement algorithms can report individual or average values. Extension of the CD technique to also measure overlay has shown promising results and additional work is in progress to fully characterize the capability. FIGURE 6 shows images and signals from CD measurements on lines and arrays. The strong correlation between optical CD and X-SEM measurements (FIGURE 7) validates the accuracy of the technique. CD measurement with the optical microscope is limited by the micro- scope’s resolution, typically 1μm or larger. Since SEM resolution is typically on the scale of nanometers, the correlation requires proper calibration. The results shown in Fig. 7 are after calibration.

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Multi-layered stacks

Most of RDL plating requires prior deposition of a Cu seed layer, the thickness of which must also be tightly controlled. FIGURE 8 (left) shows examples of the acoustic signals acquired from three Cu/ Ti stacks of varying thickness. The first positive peak of each signal gives the round-trip travel time of the sound wave in the Cu film, while the spacing between first and second positive peaks gives the round-trip travel time through the Ti layer. The echo positions are used to calculate the thickness of Cu and Ti layers simultaneously. Figure 8 (right) shows the signal of an Au/Ni/Cu/Al stack measured on UBM. The echo from each layer is distinct. Knowing the arrival times of the echoes and the speed of sound in the materials, the system calculates the thickness of all four layers simultaneously, with 3σ repeatability less than 1% for each of the layers.

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Warped wafer handling

The thin wafers/substrates used in HDFO processes can be warped significantly at several different steps in the process, most significantly by the mismatch between thermal expansion coefficients of the molding compound and the die. Warpage of 2mm or more poses a major challenge to handling and measurement systems. A specially designed vacuum chuck has three concentric vacuum zones. Applying vacuum to the zones sequentially, starting with the innermost zone and working out, the chuck pulls and holds warped wafers flat against itself to allow accurate measurements.

Conclusions

High density fan-out packaging is essential for advancing growth in mobile and networking applica- tions. The integration of multi-chip modules in fan-out processes requires complex processing using tools and materials that are significantly more expensive than traditional packaging lines. We have described an automated metrology solution that combines acoustic measurements with high resolution reflectometry and optical microscopy to provide comprehensive, gage- capable measurements for characterizing critical process steps in high volume production applications. Simultaneous measurement of multiple parameters on a single platform eliminates the need to route product through several different tools, improving the speed and efficiency, and reducing the overall cost-of-ownership, of the metrology process.

References

1. “Fan-out technnologies and MarketTrends 2016 Report”,Yole Devel- oppement, July 2016
2. “What is driving advanced packaging platforms development?”, T. Buisson and S. Kumar, Chip Scale Review, pp. 32-36,May-June 2016 3. “Recent advances and trends in advanced packaging”, J. Lau, Chip
Scale Review, pp. 46-54, May-June 2017.
4. “Status of Advanced Packaging Report,” Yole Developpement, June 2017.

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