Yearly Archives: 2017

EV Group (EVG), a supplier of wafer bonding and lithography equipment for the MEMS, nanotechnology and semiconductor markets, today announced it has received an order from the University of Tokyo for its EVG810LT plasma activation system for compound semiconductor research. Installed at the university’s Takagi & Takenaka Laboratory, the EVG810LT augments the laboratory’s research focused on developing novel MOSFET and electronic-photonic integrated circuits (EPICs) using III-V-on-insulator (III-V-OI) and germanium-on-insulator (GeOI) substrates. These advanced material substrates are designed to exceed the performance of conventional silicon semiconductors as well as silicon photonics, where III-V materials such as indium phosphide (InP), indium gallium arsenide (InGaAs) and germanium are bonded to silicon wafers. The EVG810LT activates a wafer surface using plasma for low-temperature direct wafer bonding, and has been utilized by other customers in high-volume manufacturing of silicon-on-insulator (SOI) wafers and backside illuminated CMOS image sensors.

“The miniaturization of semiconductor devices is reaching its physical limitations, and shrinking transistor (scaling) in line with Moore’s Law is not sufficient enough to address future demands for higher performance of LSI devices,” noted Dr. Mitsuru Takenaka, associate professor at the Takagi & Takenaka Laboratory with the University of Tokyo. “3D integrated circuits with III-V compound semiconductors or germanium stacked freely on silicon semiconductors are expected to be among the breakthroughs to enhance the performance of the LSIs after the end of Moore’s Law. In support of our efforts, we adopted EV Group’s plasma activation system, the EVG810LT, to help us achieve lower temperature and high-quality wafer bonds.”

Commenting on today’s announcement, Hiroshi Yamamoto, representative director of
EV Group Japan K.K., said, “It is a great honor that our system was selected to support the University of Tokyo’s leading-edge LSI device research. The innovative results at The Takagi & Takenaka Laboratory are expected to address the fundamental issues that the semiconductor industry currently faces. Based on our company’s Triple-i philosophy of ‘invent, innovate and implement’, EV Group has been working with universities and R&D facilities that are active in advanced fields. We will continue to provide the Takagi & Takenaka Laboratory with the technical support they need to succeed with their leading-edge research.”

The emergence of the Internet of Things (IoT), Big Data and artificial intelligence (AI) is fueling a new wave of demand for electronic devices with lower power consumption, higher performance, and greater functionality. To meet this demand, the semiconductor industry is evaluating the benefits of incorporating new materials with silicon-beyond pure silicon-based wafers. This shift is paving the way for future market growth of compound semiconductors, as well as more efficient manufacturing technologies to achieve maximum end-device performance. For example, metal-organic chemical vapor deposition (MOCVD) processes, where a thin film of II-VI or III-V material is deposited on a substrate by heteroepitaxial growth, can result in inconsistent wafer formation. This compromises the integrity of the wafer surface and ultimately impacts end-device performance. Direct wafer bonding with plasma activation is a promising solution to enable heterogeneous integration of different materials and to realize high-quality engineered substrates.

EVG will showcase the EVG810LT system at the SEMICON Japan exhibition being held December 13-15 at the Tokyo Bit Sight – Tokyo International Exhibition Center in Tokyo, Japan.

A team of University of Alberta engineers developed a new way to produce electrical power that can charge handheld devices or sensors that monitor anything from pipelines to medical implants. The discovery sets a new world standard in devices called triboelectric nanogenerators by producing a high-density DC current–a vast improvement over low-quality AC currents produced by other research teams.

Jun Liu, a PhD student working under the supervision of chemical engineering professor Thomas Thundat, was conducting research unrelated to these tiny generators, using a device called an atomic force microscope. It provides images at the atomic level using a tiny cantilever to “feel” an object, the same way you might learn about an object by running a finger over it. Liu forgot to press a button that would apply electricity to the sample–but he still saw a current coming from the material.

“I didn’t know why I was seeing a current,” he recalled.

One theory was that it was an anomaly or a technical problem, or interference. But Liu wanted to get to the bottom of it. He eventually pinned the cause on the friction of the microscope’s probe on the material. It’s like shuffling across a carpet then touching someone and giving them a shock.

It turns out that the mechanical energy of the microscope’s cantilever moving across a surface can generate a flow of electricity. But instead of releasing all the energy in one burst, the U of A team generated a steady current.

“Many other researchers are trying to generate power at the prototype stages but their performances are limited by the current density they’re getting–that is the problem we solved,” said Liu.

“This is big,” said Thundat. “So far, what other teams have been able to do is to generate very high voltages, but not the current. What Jun has discovered is a new way to get continuous flow of high current.”

The discovery means that nanoscale generators have the potential to harvest power for electrical devices based on nanoscale movement and vibration: an engine, traffic on a roadway–even a heartbeat. It could lead to technology with applications in everything from sensors used to monitor the physical strength of structures such as bridges or pipelines, the performance of engines or wearable electronic devices.

Liu said the applications are limited only by imagination.

University of Alabama at Birmingham physicists have taken the first step in a five-year effort to create novel compounds that surpass diamonds in heat resistance and nearly rival them in hardness.

They are supported by a five-year, $20 million National Science Foundation award to create new materials and improve technologies using the fourth state of matter — plasma.

Plasma — unlike the other three states of matter, solid, liquid and gas — does not exist naturally on Earth. This ionized gaseous substance can be made by heating neutral gases. In the lab, Yogesh Vohra, a professor and university scholar in the UAB Department of Physics, uses plasma to create thin diamonds film. Such films have many potential uses, such as coatings to make artificial joints long-lasting or to maintain the sharpness of cutting tools, developing sensors for extreme environments or creating new super-hard materials.

To make a diamond film, Vohra and colleagues stream a mix of gases into a vacuum chamber, heating them with microwaves to create plasma. The low pressure in the chamber is equivalent to the atmosphere 14 miles above the Earth’s surface. After four hours, the vapor has deposited a thin diamond film on its target.

In a paper in the journal Materials, Vohra and colleagues in the UAB College of Arts and Sciences investigated how the addition of boron, while making a diamond film, changed properties of the diamond material.

It was already known that, if the gases are a mix of methane and hydrogen, the researchers get a microcrystalline diamond film made up of many tiny diamond crystals that average about 800 nanometers in size. If nitrogen is added to that gas mixture, the researchers get nanostructured diamond, made up of extremely tiny diamond crystals averaging just 60 nanometers in size.

In the present study, the Vohra team added boron, in the form of diborane, or B2H6, to the hydrogen/methane/nitrogen feed gas and found surprising results. The grain size in the diamond film abruptly increased from the 60-nanometer, nanostructured size seen with the hydrogen/methane/nitrogen feed gas to an 800-nanometer, microcrystalline size. Furthermore, this change occurred with just minute amounts of diborane, only 170 parts per million in the plasma.

Using optical emission spectroscopy and varying the amounts of diborane in the feed gas, Vohra’s group found that the diborane decreases the amounts of carbon-nitrogen radicals in the plasma. Thus, Vohra said, “our study has clearly identified the role of carbon-nitrogen species in the synthesis of nanostructured diamond and suppression of carbon-nitrogen species by addition of boron to the plasma.”

Since the addition of boron can also change the diamond film from a nonconductor into a semiconductor, the UAB results offer a new control of both diamond film grain size and electrical properties for various applications.

Over the next several years, Vohra and colleagues will probe the use of the microwave plasma chemical vapor deposition process to make thin films of boron carbides, boron nitrides and carbon-boron-nitrogen compounds, looking for compounds that survive heat better than diamonds and also have a diamond-like hardness. In the presence of oxygen, diamonds start to burn at about 1,100 degrees Fahrenheit.

Advanced Micro-Fabrication Equipment Inc. (AMEC) today announced that the Fujian High Court in China has granted AMEC’s motion for an injunction against Veeco Instruments (Shanghai) Co. Ltd. (Veeco Shanghai). The injunction prohibits Veeco Shanghai from importing, manufacturing, selling or offering for sale to any third party any MOCVD systems and wafer carriers used in the MOCVD systems that would infringe AMEC’s patent CN 202492576 in China. The patent covers AMEC’s proprietary wafer carrier and spindle-locking and synchronization technology. The injunction covers Veeco’s TurboDisk EPIK 700 system, EPIK 700 C2 system, and EPIK 700 C4 system, as well as the related wafer carriers used in the MOCVD systems. AMEC believes that the ruling should also cover Veeco’s EPIK 868 system and related wafer carriers, since AMEC believes that the EPIK 868 system also uses AMEC’s patented technology involved in the action.

The ruling, which is unappealable, takes effect immediately. The stringent injunction terms expose the nature of Veeco Shanghai’s flagrant violation of AMEC’s intellectual property (IP) and confirms that Veeco Shanghai does not respect AMEC’s IP rights.

AMEC filed the patent infringement claim against Veeco Shanghai in the Fujian High Court on July 13th 2017. The motion requested a permanent injunction against Veeco Shanghai, as well as compensation for monetary damages of more than 100 million RMB Yuan (approx. US$15 million).

The injunction follows a previous victory for AMEC relating to the same action. When AMEC filed its claim in July, Veeco Shanghai responded by filing a patent invalidation request with the Patent Re-examination Board (PRB) of the State Intellectual Property Office (SIPO) in China. A second request to invalidate the same AMEC patent was filed concurrently by an individual. The PRB held separate hearings for the two requests. On Nov. 24th2017, the PRB dismissed both requests,thereby upholding the validity of the patent.

AMEC invested heavily in R&D and IP protection for this key technology. AMEC first developed the technology, filed a series of patents to protect the innovations, and installed equipment containing the technology at a number of LED production fabs in China. Veeco later followed by using the same locking approach in its MOCVD system to improve the tool’s performance. After AMEC filed the patent disputed by Veeco Shanghai, Veeco Instruments Inc. (Veeco US) submitted a similar patent application, and subsequently used this technology in its MOCVD system, thus infringing AMEC’s patent.

“The court’s ruling and the PRB’s decisions together confirm in no uncertain terms that AMEC’s technology contains unique innovations, and that our patent portfolio is comprehensive, robust and highly valuable,” said Dr. Zhiyou Du, Senior Vice President, COO & General Manager of AMEC’s MOCVD Product Division. “We are very pleased with the court’s decision. We take IP enforcement seriously, and we will not tolerate any violation of our IP rights. Indeed, we will aggressively pursue instances of infringement, and vigorously protect our IP portfolio.”

Dr. Du continued: “As a supplier of high-end micro-fabrication equipment to leading global manufacturers of ICs, LEDs and power devices, AMEC attaches great importance to IP protection. Since our founding in 2004, we have independently developed unique technologies to enable our customers worldwide. Therefore, for more than a decade, we have defended our IP in domestic and international jurisdictions when challenged, and prevailed in every case. We respect the IP of our customers and competitors, and we expect the same regard for our IP.”

In a separate development, AMEC filed a motion on Dec. 8th 2017 to invalidate a Veeco patent with the Patent Trial and Appeal Board (PTAB) of the US Patent & Trademark Office (USPTO). The patent, US 6,726,769 filed in 2001, covers a detachable wafer carrier technology. It was asserted in an infringement action initiated in the US by Veeco US against AMEC’s supplier of wafer carriers for MOCVD systems. AMEC believes that the Veeco patent is invalid because the technology was definitively and clearly disclosed in many prior patents and publications as far back as the early 1960s. Therefore, the Veeco patent does not meet standard patent law requirements. Besides filing to invalidate the patent in the US, AMEC has already filed motions to invalidate counterpart patent families in China and South Korea.

AMEC intends to also challenge a second Veeco US patent (US 6,506,252) involved in the same US infringement action. A motion to that effect will soon be filed with the PTAB.

Dr. Gerald Yin, Chairman and CEO of AMEC, said: “We are confident that AMEC will prevail in its action against Veeco Shanghai, and that Veeco Shanghai will be required to pay for the enormous cost of its infringement beginning in 2014 when Veeco US launched its EPIK 700 system. In addition, we believe that our supplier will eventually prevail in its US case.”

Dr. Yin further noted: “AMEC is an innovative company with extensive expertise in providing breakthrough technologies that enable customers with competitive advantages. Our products have earned market success for their differentiation and value. Naturally, we prefer to focus our efforts on providing such innovative products and stellar service to customers instead of wasting time and resources on litigation. That’s why we’re fully committed to reaching a positive resolution with Veeco, and working diligently to achieve that goal.”

Leti, a research institute of CEA Tech, today announced it has created the world’s first microfluidic circuit for cooling a particle detector, perhaps paving the way to a revolutionary, new detector technique at the Large Hadron Collider. This world-first event has been developed for CERN, the European nuclear research organization.

This breakthrough cooling system is part of CERN’s NA62 Gigatracker (GTK), a silicon pixel detector used to measure the arrival time and the position of incoming beam particles in the world’s largest particle accelerator. The NA62 detector is designed to study the “very rare” decay of kaons, subatomic particles made of quarks. Understanding these decays will help physicists check some of the predictions that the Standard Model of particle physics makes about short-distance interactions. Specifically, NA62 will measure the rate at which the charged kaon decays into a charged pion and a neutrino-antineutrino pair.

The Standard Model of particle physics explains how the basic building blocks of matter interact, governed by four fundamental forces in nature: gravity, electromagnetism and the strong and weak nuclear forces.

“The very rare decay of Kaons is sensitive to contributions coming from new particles and therefore represents a powerful way of searching for new physics,” said Augusto Ceccucci, NA62 spokesperson. “This technique complements the direct approach of the LHC detectors, and is a key component in CERN’s programs to probe the ultimate constituents of matter and understand the laws of nature.”

The NA62 is comprised of a set of three innovative silicon pixel detectors, whose job is to measure the arrival time and the position of the incoming beam particles. Installed in the heart of the NA62 detector, the silicon sensors are cooled down to approximately minus-20 degrees Celsius by a microfluidic silicon device developed by Leti and CERN researchers. The cooling system is required to remove the heat produced by the readout chips the silicon sensor is bonded to. The NA62 Gigatracker has a cooling plate on top of which both the silicon sensor and the readout chip are bonded.

In 2012, after CERN chose Leti to supply the microfluidic devices, CERN provided an initial fabrication process-flow that Leti’s Silicon Specialty Solutions (Leti-3S) program implemented in its own flow with its expertise in silicon processing, strictly following CERN’s technical specifications.

Leti-3S scientists demonstrated for the first time in the field of high-energy physics (HEP) the possibility of using silicon microfluidic devices for thermal management of silicon pixel detectors and their read-out electronics in LHC experiments.

Leti’s work included using deep silicon plasma-etching processes for microchannel production, its expertise at bonding silicon wafers at microscopic levels, and further grinding and thinning. In addition, Leti built titanium-nickel-gold contacts to connect the coolers to the NA62 device.

“The challenge was above all that we had only two pieces per wafers because of their large dimensions, meaning that two defects could result in a zero-percent yield,” said Catherine Charrier, project leader at Leti. “Maintaining the quality of the coolers on the centimeter dimensions, while respecting micrometric specifications, was a real challenge that we were able to overcome.”

Since being selected by CERN to work on NA62, Leti has contributed to the development of several types of cooling devices.

“Producing these silicon coolers provides us the opportunity to contribute to the scientific communities that use large instruments, which will expand Leti’s scope of operation,” Charrier said.

CVD Equipment Corporation (NASDAQ: CVV), a provider of chemical vapor deposition systems and materials announced today that it has completed the purchase of the Company’s planned additional facility, located at 555 North Research Place, Central Islip, NY. This new facility will be the primary manufacturing center for the Company’s wholly owned subsidiary, CVD Materials Corporation.

Leonard A. Rosenbaum, President and Chief Executive Officer stated, “With the completion of this purchase we now have the manufacturing space to accelerate our capabilities of providing materials, coatings, and surface treatments to meet our customers’ needs. We look forward to the expansion of our carbon composites and electronic material, Tantaline®, and newly acquired MesoScribe™, product lines. We also anticipate future growth, both organically and by possible future acquisitions. With the purchase behind us, we are now focusing on bringing the new facility on-line and for additional growth opportunities enabled by this additional 180,000 square foot facility.”

CVD Equipment Corporation designs, develops, and manufactures a broad range of chemical vapor deposition, gas control, and other equipment and process solutions used to develop and manufacture materials and coatings for research and industrial applications.

Power electronics, which do things like modify voltages or convert between direct and alternating current, are everywhere. They’re in the power bricks we use to charge our portable devices; they’re in the battery packs of electric cars; and they’re in the power grid itself, where they mediate between high-voltage transmission lines and the lower voltages of household electrical sockets.

Power conversion is intrinsically inefficient: A power converter will never output quite as much power as it takes in. But recently, power converters made from gallium nitride have begun to reach the market, boasting higher efficiencies and smaller sizes than conventional, silicon-based power converters.

Commercial gallium nitride power devices can’t handle voltages above about 600 volts, however, which limits their use to household electronics.

At the Institute of Electrical and Electronics Engineers’ International Electron Devices Meeting this week, researchers from MIT, semiconductor company IQE, Columbia University, IBM, and the Singapore-MIT Alliance for Research and Technology, presented a new design that, in tests, enabled gallium nitride power devices to handle voltages of 1,200 volts.

That’s already enough capacity for use in electric vehicles, but the researchers emphasize that their device is a first prototype manufactured in an academic lab. They believe that further work can boost its capacity to the 3,300-to-5,000-volt range, to bring the efficiencies of gallium nitride to the power electronics in the electrical grid itself.

That’s because the new device uses a fundamentally different design from existing gallium nitride power electronics.

“All the devices that are commercially available are what are called lateral devices,” says Tomás Palacios, who is an MIT professor of electrical engineering and computer science, a member of the Microsystems Technology Laboratories, and senior author on the new paper. “So the entire device is fabricated on the top surface of the gallium nitride wafer, which is good for low-power applications like the laptop charger. But for medium- and high-power applications, vertical devices are much better. These are devices where the current, instead of flowing through the surface of the semiconductor, flows through the wafer, across the semiconductor. Vertical devices are much better in terms of how much voltage they can manage and how much current they control.”

For one thing, Palacios explains, current flows into one surface of a vertical device and out the other. That means that there’s simply more space in which to attach input and output wires, which enables higher current loads.

For another, Palacios says, “when you have lateral devices, all the current flows through a very narrow slab of material close to the surface. We are talking about a slab of material that could be just 50 nanometers in thickness. So all the current goes through there, and all the heat is being generated in that very narrow region, so it gets really, really, really hot. In a vertical device, the current flows through the entire wafer, so the heat dissipation is much more uniform.”

Narrowing the field

Although their advantages are well-known, vertical devices have been difficult to fabricate in gallium nitride. Power electronics depend on transistors, devices in which a charge applied to a “gate” switches a semiconductor material — such as silicon or gallium nitride — between a conductive and a nonconductive state.

For that switching to be efficient, the current flowing through the semiconductor needs to be confined to a relatively small area, where the gate’s electric field can exert an influence on it. In the past, researchers had attempted to build vertical transistors by embedding physical barriers in the gallium nitride to direct current into a channel beneath the gate.

But the barriers are built from a temperamental material that’s costly and difficult to produce, and integrating it with the surrounding gallium nitride in a way that doesn’t disrupt the transistor’s electronic properties has also proven challenging.

Palacios and his collaborators adopt a simple but effective alternative. The team includes first authors Yuhao Zhang, a postdoc in Palacios’s lab, and Min Sun, who received his MIT PhD in the Department of Electrical Engineering and Computer Science (EECS) last spring; Daniel Piedra and Yuxuan Lin, MIT graduate students in EECS; Jie Hu, a postdoc in Palacios’s group; Zhihong Liu of the Singapore-MIT Alliance for Research and Technology; Xiang Gao of IQE; and Columbia’s Ken Shepard.

Rather than using an internal barrier to route current into a narrow region of a larger device, they simply use a narrower device. Their vertical gallium nitride transistors have bladelike protrusions on top, known as “fins.” On both sides of each fin are electrical contacts that together act as a gate. Current enters the transistor through another contact, on top of the fin, and exits through the bottom of the device. The narrowness of the fin ensures that the gate electrode will be able to switch the transistor on and off.

“Yuhao and Min’s brilliant idea, I think, was to say, ‘Instead of confining the current by having multiple materials in the same wafer, let’s confine it geometrically by removing the material from those regions where we don’t want the current to flow,'” Palacios says. “Instead of doing the complicated zigzag path for the current in conventional vertical transistors, let’s change the geometry of the transistor completely.”

Leti, a research institute of CEA Tech, demonstrated significant improvements in the field of memory systems at IEDM 2017 this week.

These include reconfiguring Static Random-Access Memory (SRAM) into Content-Addressable Memory (CAM), improving non-volatile crossbar memories and using advanced Tunnel Field-Effect Transistors (TFET). Another breakthrough presents a high-density SRAM bitcell on Leti’s CoolCubeTM 3D platform, which reduces the area required for memory by 30 percent, while maintaining full device functionality. This breakthrough points the way to easing the major memory bottleneck in more complex systems on chip (SoC), where up to 90 percent of the SoC area might be taken by SRAM.

The breakthroughs were reported Dec. 5 at IEDM 2017 in a paper titled “Advanced Memory Solutions for Emerging Circuits and Systems.”

A key obstacle to shrinking SRAM on SoCs is bitcell-area limitations linked to required performance and yield, both of which become more challenging as technology scales. Lowering system power consumption is also limited by memory, as the SRAM performance and its stability scale less successfully than logic performance at lower voltages. Other memories like CAM might be affected even more by voltage scaling.

“All of these obstacles become particularly important for the Internet of Things, where ultralow-power consumption and the cost of individual nodes are crucial, and SRAM limitations have a big impact on both,” said Bastien Giraud, one of the paper authors.

Leti approached these challenges with a CoolCubeTM SRAM design focusing on the development of a compact and functional four-transistor bitcell, along with other innovations:

  • Reconfiguring memory between the CAM and SRAM, depending on the application
  • Optimizing memory using TFET, focusing on the exploitation of its negative differential-resistance effect to build ultralow-power SRAM, Flip Flops (FF) and refresh-free Dynamic Random Access Memory (DRAM)
  • A new compensation technique for crosspoint memory that reduces the voltage drop and leads to larger memory arrays.

Leti said its proposed CAM/SRAM outperforms memories, with operations at 1.56GHz and 0.13fJ/bit energy per search. In addition, the proposed TFET designs are competitive in terms of area, performance and static power consumption. Leti’s proposed compensation technique in crosspoint memory also enables the design of cost-efficient large memory arrays, while reducing the impact of temporal and spatial variations.

Short-term applications include crossbar circuits for storage-class memory and flexible SOCs with SRAM/CAM re-configurability.

“In the longer term, Leti’s CoolCubeTM technology will be able to deliver very high-density SRAM,” Giraud said. “Enabling TFET-based DRAM and integrating TFET standard cells into CMOS designs will allow circuit designers to take advantage of the best features of both technologies.”

With BOE, China Star, LG Display and Foxconn expected to build seven new Generation 10.5 factories by 2020, Gen 10 and larger fab flat panel display (FPD) capacity is expected to grow at a compound annual growth rate of 59 percent between 2017 and 2022, according to IHS Markit (Nasdaq: INFO).

FPD_capacity_dedicated_to_production_of_large_are_applications

“The majority of all new incremental capacity for producing FPD televisions and other large area applications will be added at Gen 10.5 in the future,” said Charles Annis, senior director at IHS Markit. “The new Gen 10.5 fabs will install 735,000 substrates per month of capacity by the end of 2022. This is enough capacity to produce more than 60 million 65-inch televisions a year.”

Gen 8 and 8.6 fabs that currently account for the bulk of large-area dedicated supply were designed to produce 55- and 58-inch panels respectively, but suffer from inefficiency at bigger sizes. Now with premium televisions rapidly moving to larger sizes as prices fall, FPD makers are racing to build Gen 10.5 factories that are highly optimized for 65- and 75-inch panels.

Gen 10.5 factories, which use enormous 2940 x 3370 mm glass substrates, require high capital outlays to construct. Based on panel makers’ public announcements, total project costs of a Gen 10.5 LCD fab with a monthly capacity of 60,000 substrates will range between $3.4 billion and $6 billion, varying by maker and process to be adopted. To help finance such expensive factories panel makers in most cases are turning to regional governments for support.

Outfitting these fabs is creating unprecedented opportunities for the supply chain that supports them, particularly for equipment makers. According to the Display Supply Demand & Equipment Tracker by IHS Markit, FPD equipment spending will reach a record high of more than $20 billion in 2018, of which new Gen 10.5 factories are a major contributing factor.

As the many new Gen 10.5 factories begin to ramp-up, IHS Markit expects 65-inch and larger panel prices will fall continuously, about 5 percent annually. Subsequently, demand for this high-end segment of the FPD market is forecast to expand 2.5 times to approximately 40 million units in 2022.

“Sixty-five-inch and larger panels are predicted to be one of the fastest growing segments of the FPD market over the next five years. Even so, with so many new Gen 10.5 factories being built, capacity is forecast to surge ahead of demand,” Annis said. “After 2020, smaller than Gen 10 capacity is expected to start to decline as legacy factories are shuttered. The 735,000 substrates per month of Gen 10.5 capacity in the pipeline will not only dramatically increase FPD capacity, but will also shift industry leadership towards to the four companies that are building them.”

Cree, Inc. (Nasdaq: CREE) announces the commercial availability of the XLamp®XD16 LED, the industry’s first Extreme Density LED, which delivers up to 5 ½ times higher lumen density than Cree’s previous generation of high power LEDs. Built on Cree’s groundbreaking NX Technology Platform, the XD16 LED combines breakthrough lumen density, low optical cross-talk, unsurpassed thermal contact and ease of system manufacturing to enable innovative new designs for a broad spectrum of lighting applications, such as color-tuning, street, portable and industrial.

“Cree’s new XD16 LED delivers an incredible amount of light output for such a tiny package,” said Joe Skrivan, senior technical director at Black Diamond Equipment. “The XD16 LED’s breakthrough lumen output and peak intensity is a game-changer for our climbing headlamp products because we can design better beam control and decrease the overall size and weight compared to existing designs.”

The XLamp XD16 LED delivers a lumen density of more than 284 lumens per square-millimeter, which is the highest level achieved by a commercially available lighting-class LED. The ceramic-based XD16 LED utilizes the proven XQ footprint and successfully addresses challenges with luminaire manufacturing, thermal design, optical design and reliability faced by competing LEDs. For example, the XD16 LED reduces system-level optical loss by up to three times versus competing technologies when LEDs are placed close together on a board. This improvement translates into fewer wasted lumens and higher efficacy for lighting products.

“Cree’s new Extreme Density LED demonstrates that true LED innovation improves our customers’ system performance without forcing compromise,” said Dave Emerson, Cree LEDs executive vice president and general manager. “The XD16 LED delivers unmatched lumen density without the design and manufacturing challenges associated with inferior LED technology approaches. Now, lighting manufacturers can easily achieve previously unattainable levels of light output and efficacy in their existing form factors.”

The new LEDs are characterized and binned at 85°C, available in ANSI White, EasyWhite® 3- and 5-step color temperatures (2700K – 6500K), and CRI options of 70, 80 and 90. Product samples are available now and production quantities are available with standard lead times.