Synopsys and industry technologists to address the path to 2nm SoC design

Synopsys, Inc. (Nasdaq: SNPS) today announced it is hosting an advanced-technology panel on “EUV, High-NA, Metallurgy and FinFET++ – Where We Go from Here for Next-Generation Design” at the Synopsys Users Group (SNUG┬«) Silicon Valley event on Thursday, March 22, at the Santa Clara Convention Center in Santa Clara, California.

The panel will bring together prominent industry leaders from ASML, Inc., Samsung Foundry, and Qualcomm, Inc. (representing the perspectives of manufacturing, foundry, and end-user design, respectively) to discuss the challenges, opportunities and technology roadmaps inherent in driving system-on-chip (SoC) solutions beyond the 5nm process node. EDA representatives from Synopsys will include Dr. Henry Sheng, group director of R&D in the Silicon Design Group, and Dr. Victor Moroz, Synopsys Fellow in the Silicon Engineering Group.

Since 1991, SNUG has represented a global design community focused on innovating from Silicon to Software. Today, as the electronics industry’s largest user conference, SNUG brings together┬ánearly 10,000 Synopsys tool and technology users across North America, Europe, Asia, and Japan. In addition to peer-reviewed technical papers and insightful keynotes from industry leaders, the exclusive SNUG events provide a unique opportunity to connect with Synopsys executives, design ecosystem partners, and members of the local design community.

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