Data economy era begins

By Shannon Davis

Speaking at imec ITF Forum on Tuesday, Scott DeBoer, Executive Vice President of Technology Development at Micron opened his keynote address with a video that featured astounding statistics: Micron memory and storage is a part of storing the data generated by practically every type of smart device and high speeding computer processing – nearly 2.5 quintillion bytes per day.

“We’re turning information into insights and activating data to reach your higher realms of productivity and innovation,” the video’s narrator said. “We are Micron, and we are transforming how the world uses information to enrich lives.”

This would be the central theme of DeBoer’s talk, as he outlined the disruptive technology advancements taking place in the memory world and the markets they impact. According to DeBoer, we are in the early stages of the data economy.

The data economy in 2017, DeBoer indicated in his presentation, reported about 22,000 billion gigabytes created that year, compared to previous computer eras in the earlier part of the century, when about 250 billion gigabytes were created per year on average. The early stages of artificial intelligence, smart businesses, smart homes, and the interconnection of so many devices led DeBoer to make an astonishing prediction.

“Looking forward to 2021,” he said, “I’m projecting now: 62,000 billion gigabytes [per year]. Just a phenomenal growth path.”

DeBoer said continued scaling of DRAM and 3D NAND as well as the emergence of 3D XPoint memory technology would be responsible for helping maintain this kind of explosive growth in the memory sector. 3D XPoint memory technology is considered a storage class memory, and, according to DeBoer, is the only emerging memory currently.

“The way that we approach memory technology today…is quite different,” said DeBoer.

DRAM technology 15 years ago, he said, was built around enabling a personal computer system, where the quality requirements for power and performance were well-defined, and scaling continued along an expected path for many years. Today, however, the broad spectrum of technologies available and emerging markets today puts varying requirements on DRAM technology

“The same DRAM component that is ideal for a data center is absolutely not ideal for either automotive or for a mobile kind of application,” said DeBoer.

In addition to scaling, Micron has had to identify different kinds of innovations, thinking outside the box to get the kinds of performance and cost effectiveness through the years in ways that were different than just scaling memory chips.

“It’s not just about scaling, it’s about coming up with other kinds of ideas for being able to improve performance and cost structure to get those high densities for these applications,” DeBoer said. One example of this he discussed was CMOS under array, which is taking 3D technology and performance to a new level: “By taking that logic technology and putting it all underneath your array and changing the architecture of the memory, you can fundamentally change the cost structure and you fundamentally changed the performance.”

DeBoer explained that this technology take a manufacturable density of NAND and basically uses the infrastructure of that technology, and the new technology is simply the interconnect between the two layers. This, he said, takes the pressure off of the equipment industry in terms of a variety of process capabilities. It also paves the way for future NAND scaling.

Near the end of his presentation, the audience chuckled along with him as DeBoer talked about building a computer at home with his son over the fourth of July holiday weekend.

“I’m probably one of the only people that actually appreciated the fact that the memory cost was very high,” he laughed.


Easily post a comment below using your Linkedin, Twitter, Google or Facebook account. Comments won't automatically be posted to your social media accounts unless you select to share.