3D Integration

3D INTEGRATION ARTICLES



RRAM synapses mimic the brain

09/20/2012 

At this year’s IEDM, a team led by Korea’s Gwangju Institute of Science and Technology will detail a high-speed pattern-recognition system comprising CMOS “neurons” and an array of resistive-RAM (RRAM)-based “synapses,” which demonstrated STDP, a brain-like function.

On-board heaters can self-heal flash memories

09/20/2012 

At the upcoming International Electron Device Meeting, Macronix researchers will describe how they built flash memories that could heal themselves by means of tiny onboard heaters that provide thermal annealing just at the spots where it is needed.

SPTS unveils low-temp PECVD cluster tool for 3D ICs

09/19/2012 

SPTS' Delta fxP cluster system achieves low-temperature deposition of TEOS oxides and nitrides for via-reveal passivation in 3D IC packaging, solving two key problems of low temperatures and bonding adhesive outgassing.

IEDM unveils 2012 program highlights

09/17/2012 

The 58th annual IEDM will take place December 10-12, 2012 at the San Francisco Hilton Union Square, preceded by a full day of Short Courses on Sunday, Dec. 9 and by a program of 90-minute afternoon tutorial sessions on Saturday, Dec. 8.

A*STAR and Hitachi to collaborate on 3D ICs

09/14/2012 

Singapore’s A*STAR’s Institute of Microelectronics (IME), and Hitachi Chemical Co., will be collaborating on a joint research program to develop high performance material technologies for thin wafer processing for 3D IC packaging.

NIST tips "hybrid" metrology method to test chips

09/13/2012 

The National Institute of Standards and Technology (NIST) says it's combined scanning techniques and statistical data to both more precisely and less expensively measure features on a chip -- and two big chip firms are already on board.

Samsung breaks ground for memory manufacturing in China

09/12/2012 

Samsung Electronics Co., Ltd., held a groundbreaking ceremony for a major new memory fabrication line in Xi'an, China. Once completed, the new facility will make use of advanced 10-19nm technology to produce NAND flash memory chips, according to the company.

EVG updates modular coater/developer with OmniSpray, NanoSpray coating options

09/10/2012 

EV Group's updated modular EVG150 high-volume coater/developer adds new modules for conformal coating of high topography surfaces, and coating surfaces with vertical sidewall angles, such as through-silicon vias (TSV).

Singapore IME, MOSIS to offer silicon photonics wafer prototyping service

09/04/2012 

Singapore's Institute of Microelectronics (IME) and MOSIS have signed a memorandum of understanding (MOU) to offer a multiple-project wafer service targeting silicon integrated photonics.

STATS ChipPAC expands TSV work into mid-end-of-line

08/29/2012 

STATS ChipPAC says it has expanded its through-silicon via (TSV) capabilities with a 300mm mid-end manufacturing operation targeting mid-end-of-line semiconductor manufacturing, including microbump technology down to 40?m, temporary bond/de-bonding, backside via reveal, isolation, and metallization.

Bonding and cleaving at low temperatures

08/28/2012 

Brian Cronquist, MonolithIC 3D Inc.'s VP of Technology and IP reports on recent progress on low temperature (less than 400°C) bonding and cleaving processes.

Technology licensing company Rambus restructures, creates CTO role

08/23/2012 

Rambus Inc. (NASDAQ:RMBS), a technology licensing company, will undergo a restructuring and related cost saving measures to cut its expenses by$30-35 million annually.

Present on semiconductor metrology and more at ASMC 2013

08/22/2012 

ASMC 2013, the leading international technical conference for exploring solutions to improve collective microelectronics manufacturing expertise, has issued a call for papers.

Tessera receives initial Amkor payment in court award

08/21/2012 

Tessera received an initial payment of approximately $20 million from semiconductor packaging company Amkor, related to the interim award issued by the International Court of Arbitration of the International Chamber of Commerce (ICC).

Hybrid Memory Cube interface specification draft includes protocol, short-reach PHY interconnection

08/15/2012 

The Hybrid Memory Cube Consortium released the initial draft of the Hybrid Memory Cube (HMC) interface specification, with the final version planned for end of 2012.

Laser nanofabrication for mass production at the nanoscale

08/10/2012 

Laser nanofabrication can now meet the needs of submicron and nanoscale feature size manufacturing, and can operate in air, vacuum, or liquid processes. Sister publication Industrial Laser Solutions recently published Laser nanofabrication: A route toward next-generation mass production.

Supply chain readiness in an era of accelerated change

08/10/2012 

In this SEMI News and Views blog, Karen Savala covers EUV lithography, 450mm wafers, and 3D IC developments, based on her recent presentation at SEMICON West, “Supply Chain Readiness in an Era of Accelerated Change.”

Flooding in the Philippines threatens microelectronics facilities

08/09/2012 

Heavy monsoons moving through the Philippines are causing floods in and around Manila, the capital. The Philippines is a small but growing area for microelectronics manufacturing and packaging facilities.

The ConFab 2012: A retrospective

08/02/2012 

The ConFab, Solid State Technology’s invitation-only event for the semiconductor industry, took place in June, with presenters from top companies and analyst firms. If you couldn’t be there, check out all the coverage from the event -- reports, presentations, video interviews and more.




WEBCASTS



Environment, Safety & Health

Date and time TBD

The semiconductor industry is an acknowledged global leader in promoting environmental sustainability in the design, manufacture, and use of its products, as well as the health and safety of its operations and impacts on workers in semiconductor facilities (fabs). We will examine trends and concerns related to emissions, chemical use, energy consumption and worker safety and health.

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Wafer Processing

Date and time TBD

As the industry moves to 10nm and 7nm nodes, advances in wafer processing – etch, deposition, planarization, implant, cleaning, annealing, epitaxy among others – will be required. Manufacturers are looking for new solutions for sustained strain engineering, FinFETs, FDSOI and multi-gate technologies, 3D NAND, and high mobility transistors.

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