3D Integration

3D INTEGRATION ARTICLES



ECTC: Focus on 3D integration and TSVs

06/01/2012 

A main focus of this year’s Electronic Components and Technology Conference (ECTC), held this week in San Diego, is 3D integration and through silicon vias (TSVs).

Xilinx relies on stacked silicon interconnect for 28Gbps FPGA

05/31/2012 

Xilinx Inc. (NASDAQ:XLNX) began shipping a 3D heterogeneous all-programmable FPGA, the Virtex-7 H580T FPGA, using its stacked silicon interconnect (SSI) technology to reach up to 16 28Gbps and 72 13.1Gbps transceiver bandwidth.

Ziptronix wafer stacking tech expands to 3D memory devices

05/30/2012 

Ziptronix Inc. is helping a 3D memory device maker replace standard die stacking with its DBI wafer-stacking technology, which has been proven in image sensor packaging.

IC package revenues outgrow unit shipments through 2016

05/29/2012 

Increased demand for product functionality is driving up IC packaging revenue faster -- a 9.8% compound annual growth rate (CAGR) -- than IC unit growth -- 7.3% CAGR 2010-2016, says New Venture Research (NVR).

MEMS Symposium Report: Chasing 1 Trillion

05/24/2012 

The 10th Annual MEMS Technology Symposium sponsored by MEPTEC (MicroElectronics Packaging and Test Engineering Council) was held May 23 at the San Jose Holiday Inn. This year’s theme was “Sensors: A Foundation for Accelerated MEMS Market Growth to $1 Trillion.”

Invensas debuts high-I/O PoP semiconductor packaging design

05/22/2012 

Invensas Corporation, Tessera subsidiary, debuted bond via array (BVA) technology, an ultra-high-I/O PoP semiconductor packaging alternative to wide-I/O TSV packaging.

Amkor plans semiconductor packaging and test facility in Korea

05/19/2012 

Amkor Technology Inc. (NASDAQ:AMKR) plans to build a state-of-the-art factory and global research and development center in the Incheon Free Economic Zone, which is located in the greater metropolitan area of Seoul, Korea.

David McCann of GLOBALFOUNDRIES to speak at The ConFab 2012

05/03/2012 

Solid State Technology is proud to announce that David McCann will speak at The ConFab 2012. David, the Senior Director for Packaging R&D at GLOBALFOUNDRIES in Malta, New York, will speak on the evolution toward silicon-based interconnect and packaging, which is having profound impact on how we think about technology development and the supply chain.

Interposer consortium ready to expand at Georgia Tech PRC

04/26/2012 

After pioneering low-cost wafer- and panel-based glass and silicon interposers in Phase 1 of its SiGI consortium, Georgia Tech Packaging Research Center is beginning Phase 2 in June.

GLOBALFOUNDRIES installs TSV fab tools for 20nm stacked die

04/26/2012 

At its Fab 8, GLOBALFOUNDRIES is installing a special set of production tools to create TSV in 20nm wafers. 3D die stacking of leading-edge chips will enable mobile and consumer electronics.

SEMATECH highlights from VLSI-TSA

04/26/2012 

SEMATECH experts reported on innovative processes for advanced CMOS logic and memory device technologies and 3D TSV manufacturing at the International VLSI Technology, System and Applications Symposium (VLSI-TSA).

STATS ChipPAC adds Pasquale Pistorio, STMicroelectronics leader, to Board

04/23/2012 

Semiconductor packaging service provider STATS ChipPAC Ltd. (SGX-ST:STATSChP) appointed Pasquale Pistorio as a member of the Board of Directors, effective immediately.

ASMC will focus on productivity and technology challenges

04/18/2012 

The 23rd Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC 2012) will be held May 15-17 in Saratoga Springs, New York. The conference will feature presentations of more than 85 peer-reviewed manuscripts covering critical process technologies and fab productivity. This year’s event features a panel discussion on “Competing for R&D Dollars,” moderated by Solid State Technology Editor-in-Chief Pete Singer.

Conference Report: MRS Spring 2012, Day 3

04/12/2012 

Blogger Mike Fury reports from the MRS Spring 2012 meeting in San Francisco. Highlights from the third day: leakage and TDDB in low- ? dielectrics, flexible energy storage and conversion, Mn capping layers and diffusion barriers, hard masks for Cu interconnects, nanogenerators, Cu in RF, flexible temperature sensors, NEMS and MEMS in HDD, ZnO nanostructures, and various aspects of CMP.

Economy, fabless relationships, 450mm and more on deck at The ConFab 2012

04/12/2012 

The ConFab 2012, an invitation-only global conference and business meeting on semiconductor manufacturing, June 3-6 in Las Vegas, selected speakers and sessions for 2012.

Georgia Tech targets thin 3D packaging with new consortium

04/11/2012 

Georgia Tech's Packaging Research Center proposes a new consortium on 3D semiconductor packaging called 3D ThinPack for ultra-miniaturized 3D heterogeneous, RF, digital and power modules in partnership with global companies.

Conference report: MRS Spring 2012, Day 2

04/11/2012 

Blogger Mike Fury reports from the MRS Spring 2012 meeting in San Francisco. Highlights from the second day: OLED TFT displays, single transistor DRAMs, silicon photonic wires, CNTs, 3D optical interconnects, graphene for RF and sensing, transparent ZnO, epidermal electronic systems, stretchable electronics, ultra-low-k dielectrics, patterning of electroceramics, PRAM (an alternative to NRAM), and inkjet printing of superconducting films.

ALD enables 3D capacitors for CEA-Leti and IPDiA

04/10/2012 

CEA-Leti and passive component maker IPDiA developed an atomic layer deposition (ALD) process to apply medium-k dielectric layers on a metal-insulator-metal capacitor architecture, enabling 3D capacitors.

Endicott Interconnect names David Van Rossum new CFO

04/10/2012 

Endicott Interconnect Technologies has appointed David W. Van Rossum to the position of Chief Financial Officer, effective immediately.




WEBCASTS



Environment, Safety & Health

Date and time TBD

The semiconductor industry is an acknowledged global leader in promoting environmental sustainability in the design, manufacture, and use of its products, as well as the health and safety of its operations and impacts on workers in semiconductor facilities (fabs). We will examine trends and concerns related to emissions, chemical use, energy consumption and worker safety and health.

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Wafer Processing

Date and time TBD

As the industry moves to 10nm and 7nm nodes, advances in wafer processing – etch, deposition, planarization, implant, cleaning, annealing, epitaxy among others – will be required. Manufacturers are looking for new solutions for sustained strain engineering, FinFETs, FDSOI and multi-gate technologies, 3D NAND, and high mobility transistors.

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