07/10/2018 Speaking at imec ITF Forum on Tuesday, Scott DeBoer, Executive Vice President of Technology Development at Micron opened his keynote address with a video that featured astounding statistics: Micron memory and storage is a part of storing the data generated by practically every type of smart device and high speeding computer processing – nearly 2.5 quintillion bytes per day.
07/10/2018 To keep up with Moore's Law, the semiconductor industry continues to push the envelope in developing new device architectures containing novel materials.
07/10/2018 This year’s Scaling Technologies TechXPOT at SEMICON West (Scaling Every Which Way! – Thursday, July 12, 2:00PM-4:00PM) will provide an update on the evolution of scaling and describe how the various players (foundry, IDM, fabless, and application developers) are jockeying for innovation leadership.
07/10/2018 Multi-Trigger chemistry, which is designed specifically for EUV, creates a high-chemical gradient at pattern boundaries, significantly reducing blurring and improving line-edge roughness to reduce the RLS trade off.
07/10/2018 There's an old proverb that the shoemaker's children always go barefoot, indicating how some professionals don't apply their skills for themselves. Until lately, that has seemed the case with the semiconductor manufacturing industry which has been good at collecting massive amounts of data, but no so good at analyzing that data and using it to improve efficiency, boost yield and reduce costs.
07/10/2018 SEMI today announced the re-election of 10 current members to the SEMI International Board of Directors in accordance with the association's by-laws.
07/09/2018 Increasingly, the ability to stay on the path defined my Moore's Law will depend on advanced packaging and heterogeneous integration, including photonics integration.
07/09/2018 The semiconductor industry is facing key challenges. In recent years, M&A mega deals have led to consolidations within the market, while the industry continues to mature.
07/09/2018 Process-induced overlay errors from outside the litho cell have become a significant contributor to the overlay error budget including non-uniform wafer stress.
07/09/2018 To eliminate voids, it is important to control the process to minimize moisture absorption and optimize a curing profile for die attach materials.
07/09/2018 The development of a new class of materials with superior functionalities is essential to enable emerging process schemes for wafer- or panel-level FO packaging.
07/09/2018 Optimized stepping, based on parallel analysis of die placement errors and prediction of overlay errors, can increase lithography throughput by more than an order of magnitude and deliver commensurate reductions in cost of ownership. The productivity benefits of optimized stepping are demonstrated using a test reticle with known die placement errors.
07/09/2018 Molecule Blaster virtual reality game allows SEMICON West attendees to learn about and experience the abatement of PFC gases that result from the semiconductor manufacturing process.
07/10/2014 Technology innovation isnÂ’t slowing down. But its steady acceleration isnÂ’t happening spontaneously, and TuesdayÂ’s Silicon Innovation Forum keynote from Professor of Innovation Dr. Bob Metcalfe outline how he believes to effectively drive the complex cycle that is modern-day innovation.
07/09/2014 Six speakers discussed developments in designing and manufacturing silicon photonics devices in a TechXPOT North session on Wednesday morning.
