05/22/2008 STAT ChipPAC hosted its inaugural Supplier Day, honoring eleven materials and equipment suppliers for outstanding contribution as key suppliers. The awards ceremony, held on May 13 in Singapore, recognized supplier achievements in 3 categories: outstanding overall performance, outstanding service, and special site outstanding service.
05/22/2008 Diamon-Fusion International Inc. (DFI Nanotechnology), which develops nanotech coatings, has entered into a license agreement and partnership with Italian nanotechnology company Aktarus Group SRL.
05/22/2008 May 21, 2008 -- Switzerland-based Nanosensors has introduced gold- and platinum-coated variations its AdvancedTEC SPM probe for atomic force microscopes (AFMs). The highly doped monolithic silicon probes are designed for precise positioning and high-resolution imaging.
05/21/2008 May 21, 2008 - SEMI touched up its March figures for chip equipment demand, resulting in a little better picture for that month -- but the view on April figures is weak.
05/21/2008 by Ed Korczynski, senior technical editor, Solid State Technology
May 21, 2008 - Masaaki Kinugawa, GM of Toshiba's Oita operations, discussed the tough challenges faced by fabs developing advanced processes today in his Confab talk, including increasing complexity of process and device technologies (and proportionally rising costs) -- and an ugly truth waiting around the corner at the 32nm node.
05/21/2008 by Bob Haavind, Editorial Director, Solid State Technology
May 21, 2008 - Beyond today's stacked chips in a package may come higher performance 3D stacked ICs using through-silicon vias to interconnect layers, according to Sitaram Arkalgud, who spoke on the economic implications of 3D at the ConFab in Las Vegas.
05/21/2008 by Ed Korczynski, senior technical editor, Solid State Technology
May 21, 2008 - While manufacturing of 3D ICs is today limited mostly to memory chip stacks and cell-phone camera modules, the next huge application seems to be the embedded memory in microprocessors. Subramanian Iyer, distinguished engineer and chief technologist of IBM's systems and technology group, explained the economic considerations behind 3D microprocessors at the ConFab in Las Vegas.
05/21/2008 by Bob Haavind, Editorial Director, Solid State Technology
May 21, 2008 - The future of lithography from the viewpoint of a major foundry was presented at ConFab by Chartered Semiconductor 's K.K. Lin. Concurrent advances across a trilogy of disciplines (physical and computational lithography, including OPC/RET, and DFM) will be required to keep scaling alive, he said, and litho tool contenders face some significant challenges -- but with key advantages too.
05/21/2008 by Ed Korczynski, Senior Technical Editor, Solid State Technology
May 21, 2008 - In a session discussing the economic implications of 3D ICs, Qualcomm VP Tom Gregorich noted that 3D and through-silicon vias promise better performance and potentially greater freedom for chipmakers to customize functionality -- but warned that cost of integration remains an issue, and the technology still has challenges to overcome.
05/21/2008 by Bob Haavind, Editorial Director, Solid State Technology
May 21, 2008 - There's a tough road ahead for lithography, with double patterning and complex computation as well as requirements for more litho-friendly design, explained ASML's Martin van den Brink, EVP of marketing & technology, speaking at the Next Generation Lithography session at The ConFab.
05/21/2008 by Debra Vogler, senior technical editor, Solid State Technology
May 21, 2008 - This year's SPIE Advanced Lithography Conference saw glimmers of hope that EUV might be ready in time for 22nm hp. Speaking at the ConFab event, Kazuo Ushida, president of Nikon Precision Equipment Co., agreed that EUV was still the most promising solution for 22nm, and the only one that would keep the industry on track to meet cost/bit reductions needed to stay within historical guidelines.
05/21/2008 by Debra Vogler, Senior Technical Editor, Solid State Technology
Having essentially crossed EUV off its 22nm plans, Intel is looking forward to getting it ready for the 16nm node -- but also is wary of addressing mask infrastructure needs as well, notes Janice Golda, the chipmaker's director of litho capital equipment development, in her presentation at the Confab.
05/20/2008 How did designers at Kodak complete an 8-10 year MEMS project for the EASYSHARE printer in just 3 years? Kodak senior research scientist Christopher N. Delametter explains.
05/20/2008 by Ed Korczynski, Senior Technical Editor, Solid State Technology
May 20, 2008 - Kevin Jennings, VP and GM of Novellus' surface integrity division, tells WaferNEWS about the product evolution that has led to >400wph bulk stripping and >100wph for crusty implanted wafers -- as embodied in two new variations on the company's Gamma multi-station sequential processing architecture, targeting high-volume memory and logic/foundry fabs.
05/20/2008 by Pete Singer, Editor-in-Chief, Solid State Technology
May 20, 2008 - Taking a page out of the Toyota playbook, AMAT CTO/CMO Iddo Hadar challenged the audience at his Confab presentation to focus not on improving productivity but eliminating waste, including what he called "redistributed" waste across many semiconductor processes.
05/20/2008 by Debra Vogler, senior technical editor, Solid State Technology
May 20, 2008 - Among the fab design trends noted by ConFab presenter Rick Whitney, COO of US operations at M+W Zander: The rapid rise in the cost of advanced processing equipment has outpaced the cost of building fabs in the last few years, though increasing facility costs are now in line with the consumer price index. And advances in cleanliness and footprints are allowing fab design rules to be a bit less stringent.
05/20/2008 by Bob Haavind, editorial director, Solid State Technology
May 20, 2008 - Achieving significant productivity and cycle-time improvements in next-generation factories (NGFs) will require industrywide collaboration in cutting waste, particularly through "shared visualization," according to Shigeru Kobayashi, chief engineer for Renesas in Japan, at a Confab NGF panel session.
05/20/2008 Rather than introducing a new product, Zestron America will showcase its process development, optimization and cost reduction program at SMT/Hybrid/Packaging 2008. Member of ZESTRON's chemical engineering team will be on hand to provide solutions for cleaning needs before, during, and after process implementation.
05/20/2008 LED lighting is expected to replace fluorescent lighting by 2012, according to Daniel Evans, senior scientist at Palomar Technologies. This is largely due to the fact that LED lighting capabilities already match those of both incandescent and fluorescent in many applications. However, Evans says to achieve this will require continuous improvements in LED devices and packaging to extract ever increasing lumens per watt.
05/20/2008 by Pete Singer, Editor-in-Chief, Solid State Technology
May 20, 2008 - Speaking at The ConFab in Las Vegas yesterday, AMD's Doug Grose said that the timing is not right for a transition to 450mm wafers, and suggested that the concept of the industry historically moving to a new wafer size every ten years was flawed. Given the currently bleak economic outlook and that decisions in one area can affect many others, "then what sense does it make right now to really abuse the system?"
How did designers at Kodak complete an 8-10 year MEMS project for the EASYSHARE printer in just 3 years? Kodak senior research scientist Christopher N. Delametter explains.