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Silterra, IMEC extend pact to 90nm

06/14/2007  June 14, 2007 - Silterra Malaysia says it has signed a "joint development project" with European R&D consortium IMEC to create a foundry-compatible 90nm CMOS process technology, based on IMEC's process, with intention to scale to 65nm (while developing a 110nm derivative in parallel). The two already had worked on 0.13-micron process technology under a deal signed in June 2004.

Luminescent adds $9M financing, swaps CEO

06/14/2007  June 14, 2007 - Luminescent Technologies Inc. says it has raised $9 million in a new round of financing, led by new investor Adams Capital Management along with existing investor Sevin Rosen Funds. The funds will be used to continue driving adoption of the company's inverse lithography technology (ILT), which it is touting as an alternative to optical proximity correction (OPC), offering better pattern fidelity and broader lithography process windows.

Test Enterprises Expands in Asia

06/14/2007  Test-equipment supplier Test Enterprises expanded its sales and support throughout Asia by opening TEST Inc. Asia, a wholly owned subsidiary dedicated to direct sales and service support for the group of Test Enterprises companies. These include Thermonics Inc., with a line of precision temperature forcing systems; and FETtest, with discrete and analog/mixed signal semiconductor test systems.

MicroStrain's energy-harvesting node succeeds in flight test

06/14/2007  MicroStrain, Inc. says its ESG-LINK energy-harvesting nodes operated successfully in the first-ever flight test of wireless strain sensors for damage tracking of rotating helicopter parts and other critical dynamic components.

Reactive NanoTechnologies secures $14.3M Series C funding

06/14/2007  Reactive NanoTechnologies, Inc. (RNT), developer and manufacturer of its patented NanoFoil, announced it has secured $14.3M in a Series C round of financing led by Siemens Venture Capital and existing investor, Sevin Rosen Funds.

IMEC discloses finFET progress, but 32nm introduction still hazy

06/14/2007  June 13, 2007 - Providing updates on work performed with its 32nm CMOS research partners at this week's VLSI Symposium, IMEC says it has improved its process to yield "reproducible" finFETs with fin widths down to 5nm, and high aspect ratios, using 193nm immersion lithography and dry etching. However, "several bottlenecks have to be overcome" before the finFETs can be viable in manufacturing.

Toshiba eyeing 70% flash boost by next June

06/14/2007  June 13, 2007 - With prices showing signs of firming up and demand on the rise, Toshiba Corp. says it will increase production capacity of mainline flash memory by 70% over the next 12 months, according to the Nikkei daily paper.

ST tips low-power 45nm SoC results

06/14/2007  June 13, 2007 - STMicroelectronics says it has taped out the design for a low-power system-on-chip (SoC) "demonstrator" device with a multiple threshold transistors, dual-core CPU and associated memory hierarchy. The process improves speed by 20% vs. 65nm designs or reduces leakage current by half when in operation (and by "several orders of magnitude" when in retention mode), and takes up half the silicon area.

Synova, Disco to develop hybrid dicing tool

06/14/2007  June 13, 2007 - Swiss firm Synova SA and the German subsidiary of Japan's Disco Corp. say they are developing a hybrid dicing tool that combines Synova's Laser Microjet water-jet-guided laser technology with Disco's blade-saw dicing technology, to give semiconductor customers a high-throughput tool that minimizes damage to silicon and advanced-material wafers.

SIA pares chip outlook, blames ASPs

06/13/2007  June 13, 2007 - With chip sales "running well short" of last year's projections for several months now, the SIA has significantly scaled back its expectations for semiconductor industry growth this year. The SIA now projects just 1.8% growth this year to $252 billion, instead of ~10% growth anticipated from its outlook last November.

Infineon extends multigate-FET work

06/13/2007  June 13, 2007 - Infineon has disclosed an update to its work with multigate transistors, saying it's completed tests of circuits made with the new transistor architecture on 65nm processes, incorporating more than 23,000 transistors that incorporate "all of the key components" in current circuits plus SRAM. The device's record 13.9 picosecond switching time is 40% better than the previous version, touted at December's IEDM.

NemeriX/Bosch collaboration promises "revolutionary" vertical accuracy in MEMS GPS

06/13/2007  NemeriX and Bosch Sensortec say they have successfully integrated their technologies to deliver a multi-sensing GPS solution that promises significantly enhanced results for navigating urban stacked road systems and multi-level bridges and tunnels.

Chipworks and Yole partner for in-depth MEMS analysis

06/13/2007  Specialists collaborate to deliver technical and business analysis

Tezzaron, Chartered working on 2D "iRAM" hybrid, 3D ICs to come

06/12/2007  June 12, 2007 - Tezzaron Semiconductor says it is ramping its 2D "3T-iRAM" line of 72Mbit memory devices at Singapore foundry Chartered Semiconductor on the foundry's 0.13-micron process technology, and plans to use this SRAM drop-in replacement as the basis for its first 3D ICs. Robert Patti, Tezzaron CTO, discusses both technologies with WaferNEWS.

Why innovation could be the next killer app

06/12/2007  Semico Research's latest semiconductor market revenue forecast calls for a slight (0.5%) decline for the remainder of 2007 but shows a highly elastic (20%) rebound in 2008, with continued double-digit expansion for the next several years. Fueling this growth will be not a single killer app, but a host of innovative consumer electronic products, according to Jim Feldhan, president of the market research firm, speaking at a recent SEMI New England Breakfast meeting near Boston.

PACKAGING BEAT: Industry leaders vie for memory-stacking bragging rights

06/12/2007  Samsung, Hynix, and Akita Elpida have all made announcements recently about their latest achievements in memory stacking technology. There was definitely a competitive tone to these releases, but they actually appear to be pushing somewhat different agendas.

Report: Image sensor market nearing $7B

06/12/2007  June 12, 2007 - The image sensor market is projected to grow 14% in 2007, following 30% growth in 2006 to roughly $6 billion, and will slow through the next several years, with many providers jostling for position, according to a report from Strategies Unlimited.

Toshiba Touts 3D Memory

06/12/2007  Presenting at the VLSI Symposium this week in Japan, Toshiba says it has developed a 3D memory cell array structure using through-silicon vias (TSVs) that could be a potential candidate for higher-density NAND flash devices.

STATS Transfers Out Discrete Power Packages

06/12/2007  As part of a long-term portfolio refocusing onto advanced products, STATS ChipPAC Ltd. signed a definitive agreement to sell select manufacturing assets to Ningbo Mingxin Microelectronics, a high-volume manufacturer that caters to the power semiconductor market. Divesting assembly and test assets for discrete-power-package manufacture will allow STATS to concentrate resources on high-growth, advanced packages, noted Tan Lay Koon, president and CEO, STATS.

Toshiba touts SONOS structure in new 3D memory

06/12/2007  June 12, 2007 - Presenting at the VLSI Symposium this week in Japan, Toshiba says it has developed a new 3D memory cell array structure using through-silicon vias that could be a potential candidate for higher-density NAND flash devices.