Featured Content




IPCore Chooses Agilent Test System to Build on Design, Test Services in China

11/09/2005  Palo Alto, Calif. — IPCore Technologies Corp. has selected Agilent Technologies' 93000 SOC Series test system to expand its digital, mixed-signal, and RF device test services into such applications as high-definition television (HDTV). Agilent also is teaming with IPCore on test-program and load-board design, and is committed to developing IPCore engineers' test expertise in the 93000 platform.

IWLPC Highlights

11/09/2005  By George Riley, Ph.D., Advanced Packaging contributing editor
San Jose, Calif. — The second International Wafer Level Packaging Conference, held Nov. 3–4 in San Jose, highlighted industry changes since last year. Talk was of rapid growth, new market opportunities, and technology improvements. The keynote speaker stimulated that enthusiasm by discussing the just-announced purchase of Shellcase Limited assets.

Toshiba and NEC to ally on 45nm logic process technology

11/09/2005  November 9, 2005 - Toshiba Corp., Tokyo, Japan, and NEC Electronics Corp. have entered into an agreement to co-develop 45nm CMOS logic process technology, allowing the companies to "share burdens and accelerate development, while raising system LSI performance and quality," according to a joint statement.

Samsung companies to spend $44.9B on 5-year R&D plan

11/09/2005  November 9, 2005 - Samsung has announced a 47 trillion (US$44.9 billion) Korean won (KRW) investment plan aimed at vastly expanding the R&D capabilities of Samsung affiliates in the areas of electronics, mechanics, and chemicals. This plan also envisions the recruitment of some 30,000 new R&D staff by 2010.

Nanosys raises $40 million financing

11/09/2005  Nanosys Inc., a privately held company focused on developing nanotechnology-enabled products, announced that it has raised approximately $40 million in a private equity financing.

Tessera Leapfrogs WLP Competition

11/08/2005  By George Riley, Ph.D., Advanced Packaging contributing editor
Tessera Technologies' November 1, 2005 announcement that they will purchase the intellectual property and various assets of Shellcase Limited proves this chip scale package pioneer is determined to establish a similar leading position in wafer-level packaging (WLP).

Knights, Cadence Team to Address Yield Ramp Challenges

11/07/2005  Sunnyvale, Calif. — Knights Technology and Cadence Design Systems Inc. are teaming in a collaborative program, including the validated interoperability of Knights' Camelot and YieldManager software with the Cadence Encounter Diagnostics solution. This collaboration aims to enable design and manufacturing personnel to better use yield diagnostic and fab data to identify and resolve yield excursions.

WELLS-CTI Launches Socket Family for Programmable ICs

11/04/2005  Phoenix, Ariz. — Burn-in sockets supplier WELLS-CTI has developed a high-performance, high-cycle-life programming socket family — designated the 780 Series — aiming to increase customer yields. Ideal for volume production, this socket offering accommodates CSP and fBGA packages, and accepts both lead-free and eutectic solder balls.