June 16, 2003 – Japan’s Renesas Technology Corp. and Matsushita Electrical Industrial Co. have developed technology that can cut power consumption of 90nm conductors by more than 90%.

In a prototype SRAM device built to a 90nm design rule, the technology can reduce the current leakage to 1.2 microamperes, about 1-13 the amount that leaks from a traditional SRAM device.

The two companies hope to have a practical version of the technology ready by 2005. Sacrificing power efficiency for time-to-market, Intel and other chipmakers are planning to begin producing 90nm processors as early as fall 2003.