August 2, 2005 – The members of the Blue Whale Consortium have announced the successful completion of their mission to develop high-performance, cost-effective chip-size wafer-scale packaging (WSP) for system-on-chip (SoC) for handheld devices. Members include Philips Applied Technologies, which also served as the project manager; DEK International (UK); Dimes, a subsidiary of Delft University of Technology (the Netherlands); Shellcase Ltd. (Israel); and TU Berlin (Germany).

The Blue Whale Consortium was created in 2002 with the objective of demonstrating wafer scale packaging concepts for RF SoC and for power devices, as well as to develop equipment for a wafer balling process. This particular project was funded by the IST, the Information Society Technologies Programme of the Fifth Framework Programme of the EC.

SoC solutions, which entail integrating several system functions into one piece of silicon (monolithic integration), avoid the problem of having too high a ratio of the semiconductor area being used for interconnects.

“System-on-Chip is expected to evolve rapidly in the coming years,” said Dr. Co van Veen, who led Philips Applied Technologies’ involvement in the consortium. “By combining a RFCMOS-IC, with mixed functionality potential, and wafer level packaging, we showed that it is possible to achieve a 90% reduction in occupied area on the printed circuit board, compared with the standard QFP solution.”

Contrary to existing single-chip packaging or system-in-package, the Consortium members demonstrated a chip-size wafer-level packaging technology to achieve “true die-size” packaging.