J. Robert Lineback, Senior Technical Editor
Out of the blue comes an unexpected milestone in immersion lithography. IBM Corp. has plunged ahead and used a 193nm immersion scanner to print an interconnect layer on fully functional 64-bit microprocessors to prove that adding water to lithography really works.
The bold exercise, conducted last October and November, involved a production lot of 25 300mm wafers, pulled from IBM’s fab in East Fishkill, NY, and taken to the Albany NanoTech center in Albany, NY, where an immersion scanner was used to pattern one mask layer for back-end-of-line processes in 90nm copper technology. The wafers were then completed at IBM’s 300mm fab using standard 193nm dry lithography. Tests showed that the finished 64-bit processors yielded as well as similar 90nm products made completely with dry exposure tools, said IBM, which now claims to be the first company to produce a working commercial IC design using immersion lithography.
“I think this is a big landmark in the use of immersion,” John Warlaumont, director of lithography systems in IBM’s Systems & Technology Group, told WaferNews. “This gives us greater confidence that the aspects of immersion–doing exposures in water–is going to work. The industry is going to be making investment decisions on immersion and non-immersion lithography, and so this is a huge confidence builder in the future of immersion.”
IBM is guarding many details about the immersion experiment and resist processes used at the Albany NanoTech center. A standard reticle was used to expose the wafers on ASML Holding NV’s TwinScan AT:1150i immersion scanner, installed at Albany NanoTech several months ago. The immersion exposure was applied to a mask level “where topography is generally an issue,” Warlaumont explained, and where “immersion’s big benefit is depth of focus.” The results showed acceptable control of overlay, critical dimensions (CDs), and DOF, he added. IBM detected some defects in the immersion lithography process, but these had no apparent impact on device yields. “We did not detect any limits in performance,” said Warlaumont, referring to final wafer tests and module testing of the 64-bit Power processors. He added that the data set from the immersion-exposed wafers was “not huge,” but “the immersion exposure was a critical 90nm level, and that was sufficient to prove what we wanted to see.”
For two years, immersion lithography has rapidly gained momentum in development and support from major semiconductor manufacturers, which need new exposure tools to help ease the difficulties and cost of printing sub-wavelength feature sizes with today’s 193nm argon-fluoride (ArF) scanners. The immersion bandwagon has picked up enough speed to knock 157nm fluoride (F2) scanners completely off the industry’s lithography roadmap for 65nm and 45nm processes. Early R&D results in immersion lithography have been encouraging, with no major “showstoppers” uncovered. Prototype immersion tools and processes have focused on producing isolated test structures in an attempt to prove out concepts and evaluate the impact of water on resists, lenses, and the high-speed scanning motion of lithography platforms. Most experts have been expecting to see working devices made with immersion lithography in early 2005.
In doing the immersion exposure, only the photoresist process was changed, compared the standard 193nm dry lithography steps used in IBM’s 300mm fab, Warlaumont said. “It is a very different resist process, which tolerates water,” he added, referring to the fluid sitting between the last lens element and the wafer. “Some of the coatings had to be changed. We were sort of surprised at how well it went and how quickly we were able to get the process up and running.” Warlaumont declined to describe the resist in detail or say if a topcoating was used to protect against contamination. IBM plans to present a technical paper on its immersion lithography work at the annual SPIE International Symposium on Microlithography in San Jose, CA, in late February.