April 20, 2007 – TSMC has formed an exploratory R&D team to evaluate feasibility of 450mm wafer production and determine equipment needs and possible yield rates, though the company stresses that the effort is only to assess its options, according to the Taiwan Economic News.

C.T. Du, general director of Taiwan’s Industrial Economics and Knowledge Center (IEK) under the government-backed Industrial Technology Research Institute (ITRI), disclosed the TSMC work at a workshop in Taipei, according to the paper. Chip production utilizing 22nm process technology on 450mm wafers is on the ITRS as due by 2012, though only a handful of chipmakers (primarily Intel and Samsung, but possibly also TSMC, PowerChip, Nanya, and ProMos) would have production capabilities, the paper said.

TSMC’s assessment of 450mm investment suggests the firm sees possible benefits but won’t easily be swayed into adopting the next-generation wafer size, for which fabs could cost as much as $10 billion to build. The debate between chipmakers seeking efficiencies and suppliers taxed with developing supporting technologies continues to be a sensitive issue, with many believing that the 2012 ITRS timeframe is far from realistic, and that 2020 or 2025 is a more likely scenario for a wafer-size change implementation — if it happens at all.

Last year the International SEMATECH Manufacturing Initiative (ISMI) created a program, 300mm Prime, to develop a strategy for steering 300mm efficiency efforts as a precursor to push adoption to 450mm wafer sizes. Intel and TSMC assignees participate in the program. Intel also has cited internal metrics calculating the environmental benefits of 300mm conversion, suggesting possible best practices and lessons required for a future 450mm transition.