by Ed Korczynski, senior technical editor, Solid State Technology
May 22, 2008 – Peter Yates, SVP of NXP Semiconductor, discussed his company’s strategy to navigate troubled-waters in many nimble ships. Manufacturing joint-ventures such as SSMC and ASEN augment capacity at mature internal fabs. Since Philips was one of the earliest investor and customers of TSMC, and NXP continues the relationship with NXP/TSMC R&D in The Netherlands, NXP is arguably the most-favored customer at the world’s leading foundry.
It’s arguable that the rest of the world is just now fully embracing the fab-lite business model which Philips/NXP first showed 20 years ago. Now the company is leading with a new business model for the design side, with a recently announced wireless semiconductor JV with STMicroelectronics. The new company will have 9000 employees worldwide contributed from both partners, and own no fabs. However, it will acquire some test and assembly facilities, and it will have access to fab capacity at both parent companies if it doesn’t want to use commercial foundries.
IDMs have long used “asset light” concepts to refer to a sustainable overflow model, such that the majority risk associated with demand swings is pushed on to other companies. For advanced CMOS logic wafer manufacturing, the fabless-foundry model is rapidly developing into the new standard.
NXP’s core strategy is still to minimize the investment in wafer manufacturing, which includes investments in mature NXP lines, and spending on advanced CMOS technology development in partnership with TSMC. SSMC in Singapore is a wafer manufacturing JV between the two companies. NXP plans to invest a total of >$1.3B in R&D in 2008, of which ~$400M will move out with the new wireless JV with ST.
Yates discussed the asset-light theory behind this new JV. The IDM remains as the primary business and technology driver of the industry, despite the rise of fabless IC companies and the existence of semiconductor assembly and test services (SATS) companies (see figure). As the industry consolidates, NXP sees that IDMs will be faced with managing increasingly complex product portfolios, and will follow NXP’s lead by spawning “offspring” into quasi-independence.
Blurring boundaries between IDMs, foundries, and fabless companies. (Source: NXP)
Yates calls this new type of company “semi-fabless,” since it owns no fabs yet it does have assembly and test lines. Owning no wafer fabs, such companies will source wafers from third-party foundries and from parent companies. This model reflects the fundamental differences in where value is added in manufacturing, and where technology development carries the greatest risk.
Wafer manufacturing for advanced nodes today is characterized by growing R&D expenditures for tools, materials, and process flows. With the manufacturing capacity coming in huge discrete chunks of multi-billion dollars, foundries can aggregate the investment risk and profit in the long run. In contrast, assembly and test technology evolves relatively very slowly, and growth can be supported by modest incremental capex. As a result of these trends, IDMs increasingly will go fabless for wafers, but will keep assembly and test in-house along with traditional volume overflow to SATS providers, Yates said.
In our complex industry, it is likely that different successful models will emerge to deal with the increasing costs of manufacturing. New foundries to supply analog and mixed-signal chips for IDMs could emerge when old 200mm wafer memory lines are freed up by the ongoing conversion to 300mm lines. Established first-tier foundries and SATS companies may start sending overflow business to second-tier foundries to spread risk like IDMs have long done. Leading fabless companies may enter into more fab JVs with foundry partners, as the latter offer design services such that “virtual IDMs” are established. — E.K.