STATS ChipPAC opens 300mm embedded WLP BGA (eWLB) manufacturing fab

(Marketwire – September 15, 2010) — STATS ChipPAC Ltd. (SGX-ST: STATSChP) celebrated the grand opening of its new 300mm embedded Wafer-Level Ball Grid Array (eWLB) manufacturing facility. The official inauguration was held at STATS ChipPAC’s Yishun facility in Singapore with more than 150 local dignitaries, customer representatives, business partners and management participating.

In April 2010, STATS ChipPAC implemented 300mm eWLB wafer manufacturing capabilities. STATS ChipPAC’s robust, automated eWLB manufacturing process includes wafer reconstitution, wafer level molding, redistribution using thin film technology, solder ball mount, package singulation and testing. STATSChP has over 35 million eWLB units shipped to date.

The transition from 200mm to 300mm eWLB wafer manufacturing provides STATS ChipPAC cost and productivity benefits such as higher efficiency and economies of scale as compared to the existing 200mm eWLB reconstituted wafer format. STATS ChipPAC’s initial investment in eWLB technology totals more than US$100 million. The transition to 300mm eWLB manufacturing coincides with the company’s focus on increasing productivity per worker by more than two fold.

Earlier this week, Freescale announced a 300mm technology partnership for its wafer-level packaging (WLP) technology, RCP.

"We believe eWLB technology is quickly becoming the new advanced packaging solution that more customers are choosing to satisfy the relentless consumer market demand for complex and power efficient semiconductor devices in mobile phones and other handheld electronic products. Our goal is to deliver innovative, cost effective manufacturing technology to customers and help them rapidly ramp to volume production," said Tan Lay Koon, president and CEO, STATS ChipPAC.

STATS ChipPAC expects to continue to invest to further expand its eWLB capacity and capabilities over the next three years as the market demand continues to grow for small form factor, small footprint solutions with an increasing number of interconnects. Advanced fab technology nodes drive smaller silicon die sizes with finer interconnect pitches. The eWLB design advantage is that the package size is larger than the silicon die in order to provide sufficient area for the interconnection of the package to the application board. As a result, eWLB has the potential to realize a higher number of interconnects with standard pitches at multiple wafer technology nodes, according to the company’s statement.

STATS ChipPAC Ltd. is a leading service provider of semiconductor packaging design, assembly, test and distribution solutions in diverse end market applications including communications, digital consumer and computing. Further information is available at www.statschippac.com.

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