Lasertec joins SEMATECH 3D packaging research, installs 300mm TSV IR etch metrology tool

(July 8, 2010) — Lasertec Corporation of Japan has joined SEMATECH’s 3D Interconnect program at the College of Nanoscale Science and Engineering (CNSE) of the University at Albany. Lasertec will partner with SEMATECH to develop robust, cost-effective process metrology technology solutions for readying high-volume via-mid through silicon via (TSV) manufacturing. 

The collaboration between Lasertec and researchers from SEMATECH’s 3D Interconnect program will include investigations and comparisons of 3D TSV depth metrology schemes. This work is necessary not only for TSV RIE process control, but also for providing critical feed forward data for wafer thinning and TSV expose processes. To facilitate this work, Lasertec will place a 300 mm TSV infrared (IR) etch metrology tool in SEMATECH’s 3D R&D center, providing advanced measurement capabilities that will enable accurate, repeatable TSV depth measurements over a range of TSV dimensions.

“We are pleased to welcome Lasertec to the 3D program,” said Sitaram Arkalgud, director of SEMATECH’s 3D Interconnect program. “Our common goal is to address the technical challenges of via-mid TSV technology. The metrology expertise of Lasertec combined with the capability of the TSV 300-IR will fill an important gap in our integration scheme. Together, we will provide our members with a world class TSV depth metrology solution capable of addressing today’s needs as well as tomorrow’s aggressive dimensions.”

Sitaram Arkalgud, Sematech, summarized the company’s 3D metrology to measure TSV depths and profiles. This technology is important to determine how far to thin wafers. He also updates SST/AP on TSV standardization.

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“Lasertec is looking forward to contributing our expertise in the fields of metrology and inspection to further explore innovative metrology capabilities that will make 3DTSVs commercially viable,” said Hal Kusunose, CTO of Lasertec. “Our cutting-edge TSV 300-IR tool will allow SEMATECH researchers and SEMATECH’s member companies to address important metrology challenges of TSV technology.”

“The leading-edge R&D that is critical for commercializing innovative TSV technologies will be further enhanced by the addition of Lasertec to CNSE’s Albany NanoTech Complex,” said Richard Brilla, CNSE VP for strategy, alliances and consortia. “This new collaboration builds on the SEMATECH-CNSE partnership to support the advanced technology needs of our global corporate partners and the nanoelectronics industry.”

TSV technology is a method of combining integrated circuits (ICs) in a vertical stack to enable high functionality and performance with low power consumption in a small footprint. While employing many standard chip manufacturing and packaging processes, TSVs present several new technical and logistical challenges, now being addressed by SEMATECH.

SEMATECH’s 3D program was established at CNSE’s Albany NanoTech Complex to deliver robust 300 mm equipment and process technology solutions for high-volume TSV manufacturing. To accelerate progress, the program’s engineers have been actively engaging with leading-edge equipment and materials suppliers. Eventually, 3D interconnects will provide cost-effective ways to integrate diverse CMOS technologies and chips with emerging technologies such as micro and nano electromechanical systems (MEMS, NEMS) and bio-chips.

Lasertec supplies innovative semiconductor, LCD and PV related inspection and measurement equipment: TSV etching depth inspection system, wafer inspection/review system, EUVL mask blank inspection system, photomask inspection system, photomask haze removal system, color filter repair system, PV cell conversion efficiency distribution measurement system and various types of confocal laser microscopes. For more information, go to www.lasertec.co.jp.

The UAlbany CNSE college is dedicated to education, research, development, and deployment in the emerging disciplines of nanoscience, nanoengineering, nanobioscience, and nanoeconomics. The UAlbany NanoCollege houses the only fully-integrated, 300mm wafer, computer chip pilot prototyping and demonstration line within 80,000 square feet of Class 1 capable cleanrooms. For more information, visit www.cnse.albany.edu.

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