Laminated Thin Film Resistors on LCP
By Swapan K. Bhattacharya, Stephen Horst, and John Papapolymerou, Georgia Institute of Technology
Resistors have several applications in high-frequency circuits including use in attenuators, terminations, power dividers, and oscillators. For server applications, the resistors are used primarily for pull up and pull down and require resistance values in the range of 1 – 40KΩ. The widely implemented termination resistors require resistance values around 50Ω. Embedded resistors are generally implemented with either thick- or thin-film processes. Thick-film resistors are typically metal oxides applied using a screen printing technique.1-3 Thin-film processes use a variety of metal alloys usually deposited by sputtering process under vacuum to produce a very uniform film on the order of a few thousand ?.1,4 This method is preferred for microwave resistor applications, however, the vacuum requirement of the sputtering process limits the sputtered area, effectively increasing per unit cost of implementing thin film resistors. An alternative to this approach involves the use of commercially available resistive films on a carrier conductive copper foil.5-8
Resistors Fabrication
Although numerous choices of materials and processes exist for embedded resistors on printed circuit boards, implementation of thin film resistors on LCP substrate for broadband application is extremely limited.1 For the first time, design, fabrication, and measurement of embedded resistors up to 40GHz on LCP substrate using a commercially available laminated resistive foil are reported.6 The integrated foil used for this process is ½ oz. copper with NiCrAlSi sputtered onto the matte side using a roll-to-roll vacuum deposition technique. These films are commercially available with various sheet resistances in the range of 25 to 250 Ω2. The foil transfer involves a three step processes depicted in Figure 1. The first etching step upon lamination of the resistor foil onto LCP is used to etch through both the copper and resistive layers to pattern the physical shape of the structures. The second etch exposes the resistors by selectively removing the copper layer.
Resistor fabrication by foil lamination process.
Resistor Characterization
Several methods were tested to predict the RF performance of the resistors, but the best method used HFSS, the numerical field solver program from Ansoft. In the field solver, the resistors are represented by an ideal impedance boundary, while the transmission line portions are represented by perfect electric conductors. The field solver model, shown in Figure 2, also used a length of de-embedded transmission line to allow the port solver to correctly set up the proper source fields. The current vector field and loss density plot reveal the major difference between the circuit model and the field solver model.6 These plots show that most of the loss in the resistor occurs at the leading edge, with the trailing edge showing very little current and therefore very low loss. This current bunching phenomenon is most apparent in long resistors but produces the same effect. Since a majority of the current flows through a small portion of the resistor, this effectively shortens the resistor and increases the measured impedance. The shift from this effect is only a few Ohms, but it is enough to account for most of the differences seen in the circuit model.
The field solver model provides a model for measurements. The plots in Figure 3 are shown with both an ideal and an adjusted simulated value across frequency from 2 to 40GHz. The ideal values use resistances calculated from the nominal dimensions. The adjusted values eliminate this variable by substituting the measured dimensions of the fabricated resistor to calculate the resistance value. The smaller resistors, whose dimensions are more difficult to etch accurately, have a higher deviation from their nominal value, but once this variable is removed from the measurements the resistors behave close to the predicted model.
Termination
Several different termination topologies were simulated to provide a 50Ω load with the smallest parasitic response across the broadest range of frequencies. Simulation plots of the various topologies are shown in Figure 4. The CPW topology is identical to the characterization structures. The biggest change from these structures is the transition from the CPW style transmission line to a microstrip line, which is a more common interface, thus requiring vias to the common ground. The series topology had a predictably higher inductance response than the others since one single inductor has a higher value than two inductors in parallel. The hammerhead topology removed the center conductor from the termination region, making the entire termination out of resistive material. This indeed reduced the inductance, making the termination capacitive. The angled parallel models provide good response, but none come as close to maintaining a 50Ω impedance as the aforementioned CPW structure.
Since the CPW topology was determined to provide the best response, these termination structures were fabricated as shown in Figure 4. Measurements were taken using a TRL calibration.
Figure 4: Simulated termination topologies.
The results in Figure 5 show that although the measured results display a much more rapid phase-shift around the Smith chart, the impedance still remains close to 50&Omega.
Figure 5: a) designed b) fabricated termination structure, and c) measured and simulated data
Power Handling
For applications such as MEMS and antennas, large DC and RF powers may be required. Therefore, power handling capability of thin-film resistors becomes a critical parameter which has recently been investigated by Ponchak et al.8 Their study concludes that the thin-film NiCrAlSi resistors LCP have good temperature stability and predictable resistance. However, for reliable operation, the DC power should be backed off 40% from burnout power and the RF power should be backed off 6dB from burnout power. As expected, power handling capability increased with increased resistor area.
Conclusions
Thin film resistors can be fabricated on LCP using a foil lamination process. Laminated foil resistor measurements up to 40GHz showed minimal deviation from the simulated results. A model has been presented that provides the circuit performance for terminations of arbitrary length. The lamination process for integrated resistors has the potential to reduce the cost of creating accurate resistances across a wide band of frequencies. The terminations measured here were accurate to 5% based on their measured physical dimensions.
References
1. Ulrich, R. and Schaper, L., Edited, Integrated Passive Component Technology, IEEE Press, New York, 2003.
2. Wasserman, Y, “Integrated Single-Wafer RP Solutions for 0.25-micron Technologies,” IEEE Trans-CPMT-A, Vol. 17, No. 3 (1995), pp. 346-351.
3. Bhattacharya, S., Edited, “Metal-Filled Polymers: Properties and Applications”, Marcel Dekker, Inc., New York, 1986.
4. Bhattacharya, S. and Tummala, R., Next generation integral passives: materials, processes, and integration of resistors and capacitors on PWB substrates. Journal of Materials Science: Materials in Electronics, 2000. 11 (3): pp. 253-68.
5. J. Wang, M. K. Davis, R. Hilburn, and S. Clouser, “Power dissipation of embedded resistors,” 2003 IPC Printed Circuits Expo, Long Beach, CA, March 23-27, 2003.
6. S. Horst, S. K. Bhattacharya, S. Johnston, J. Papapolymerou, M. Tentzeris, “Modeling and Characterization of Thin Film Broadband Resistors on LCP for RF Applications”, 56th Electronic Components and Technology Conference, San Diego, May, 2006, pp 1751-1755.
7. K. J. Lee, M. Damani, R. Pucha, S. K. Bhattacharya, S. Sitaraman, R. Tummala, “Reliability modeling and assessment of embedded capacitors on organic substrates”, IEEE Transactions on Component and Packaging Technology, Vol 30, No. 1, March, 2007, pp 152-162.
8. G. Ponchak, J. Jordan, S. Horst, J. Papapolymerou, “RF and DC Power Handling Characterization of Thin Film Resistors Embedded on LCP”, IEEE ECTC 2008, pp 713-717.
Swapan K. Bhattacharya, Stephen Horst, and John Papapolymerou may be contacted at the School of Electrical and Computer Engineering, Georgia Institute of Technology Atlanta, GA 30332, USA. Email: [email protected]
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