Tessera and Intel make strides in stacked chip technology
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BY KATHLEEN M. PETERSON
Arecent U.S. News and World Report article stated that “…today's technophiles expect their electronic devices to deliver top-notch performance in a tidy package their peers will envy. Smarter, smaller and more stylish is the mantra.”
This comes as no surprise to those making such devices. In the latest response to such consumer demand, Tessera Inc., a provider of intellectual property for chip-scale packaging (CSP), and chip-maker Intel Corp. have teamed up in an effort to advance stacked chip technology. The result is a new technology called “folded stacked technology,” which allows three silicon die to be vertically mounted in a single package less than 1.0 mm high.
Tessera and Intel previously collaborated on such a project in 1996, when they developed the first CSP application for cellular phones. The package, termed the µBGA, is now a mature technology. They are hoping that folded stacked technology will create a similar breakthrough in next-generation semiconductor packaging technology for wireless and portable devices.
What Is Stacked Packaging?
Stacked packaging involves stacking multiple silicon die vertically inside the same package. This technology combines various individual semiconductor components, such as memory, computing and communication devices, within one package. While there are a number of stacked packaging approaches currently on the market, they can still face challenges meeting height requirements and accommodating a wide variety of die sizes.
Tessera and Intel's folded stacked technology differs from other stacked technologies in several ways. Most other 3-D packages have only recently been able to accommodate more than two die, and the thickness is typically 1.4 mm or thicker. This height has been necessary because of the need for overmolding and for large solder balls that manage stress between the package and board. The stacked packages, however, incorporate three die into 1.0 mm, in large part because of the ability to use smaller balls with tighter pitch. This is possible because stress management is built into the folded packages with a flexible compliant layer.
 Figure 1. Folded stacked technology uses less than one-third the real estate needed for the same functionality in TSOPs. |
The folding process is the most notable new development found in this package. Figure 1 illustrates how three silicon die can be folded into a package that is smaller than one thin small-outline package (TSOP).
Sandra Winkler, a senior analyst for Electronic Trend Publications, said, “Tessera's folded stacked package is very intriguing and amazingly compact, particularly in the 'z' dimension. The package's small size and ability to stack multiple devices without cross talk and wire wash are tremendous strengths; the down side is that the devices must have low power requirements and lower performance requirements as the signal traces are fairly long.”
Winkler added that this limitation will not be particularly detrimental, however, because the technology works well for applications like flash and SRAM devices in wireless products – the intended market for the folded stacked technology.
The technology is targeting mobile phones and other portable devices that require small size and increased functionality. Tessera claims that it offers the thinnest form factor on the market today and has been tested to high reliability under all conditions. While such an application is still down the road, Tessera's wireless business unit vice president, John Riley, is confident that folded stacked packaging will enable a new generation of products, such as cell-phone-in-a-package, wherein all functions of the device are stacked in one package.
Feasibility and Future Projects
Producing folded stacked packages in volume looks to be a straightforward task, because the infrastructure for production is already established. The folded 3-D packages are produced on a standard µBGA production line with an additional station for the folding process at the end.
Additionally, the packages are completely lead-free compatible because the necessary small solder balls can be made of any alloy, and the packages can make use of center-bond-leaded parts. The package accommodates multiple die size and bond pad configurations, including same-size die.
Jack Quinn, president of Micrologic Research, calls the folded stacked technology “practical” and “will have a tremendous impact on wireless communications by making wireless so small and cheap that it will become an embedded technology.” Quinn believes that the future for this technology will make it easy and practical to embed cellular telephones modules into such devices as utility meters and vending machines.
“We also see a bright future for folded stacked technology in Bluetooth personal area networks and in 802.11 wireless LANs,” said Quinn.
Worldwide packaging/assembly market grew 81 percent in 2000
SAN JOSE, CALIF. – Primarily driven by increased assembly demand in the Asia-Pacific region, the worldwide semiconductor packaging and assembly equipment market reached $4.6 billion in 2000, an increase of 81 percent over 1999 revenue. According to Dataquest Inc., a unit of Gartner Inc., the Asia-Pacific region consumed more than 60 percent of all equipment. Of packaging equipment, Japan reportedly accounted for 22 percent, North America less than 10 percent, and Europe less than seven percent.
“Driven by increased assembly demand and a general economic recovery, Asia-Pacific continues to be the world's leading region,” said Jim Walker of Gartner Dataquest's semiconductor group. “North America has been impacted by the continued trend toward outsourcing in Asia-Pacific. European shipments have been driven by the flip-chip and advanced packaging equipment sectors.”
The top five vendors remained the same as last year, with Kulicke & Soffa in the number one position with a market share of 13.2 percent. Dai-Ichi Seiko dropped from number six to number nine, while Electroglas entered the top 10 for the first time.
Array-oriented packaging technologies and incremental capacity additions helped to make 2000 a significant growth year for flip-chip bonders, solder ball placement and wafer bumping equipment. Wire bonders continued to be the largest equipment segment for semiconductor packaging, with a 32.4 percent market share.
“We believe that growth levels will slow in the first half of 2001 and return to more reasonable levels by the first half of 2002,” Walker said. “However, as array packaging becomes more dominant, changes will be evident in 2001 as the demand for more flip-chip bonders, wafer bumping equipment and solder ball deposition increases. We also expect industry consolidation to continue in terms of acquisition activity, concentration of market share and the continued convergence of functional/ processing overlapping with PC board assembly equipment.”
Credence to acquire Integrated Measurement Systems
FREMONT, CALIF. – Credence Systems Corp., a provider of test equipment for semiconductor makers, has announced plans to acquire Integrated Measurement Systems Inc. (IMS) for approximately $170 million in stock. The combination with IMS, which provides integrated circuit validation systems, will create the first test equipment company to provide solutions from silicon characterization and validation to high-volume production test, Credence said.
The deal is expected to close in the third quarter of this calendar year and is subject to various closing conditions, including approval by IMS's shareholders and expiration of the waiting period under the Hart-Scott-Rodino Antitrust Improvements Act.
TSMC approves Amkor Taiwan Semiconductor Tech deal
TAIPEI, TAIWAN – The board of Taiwan Semiconductor Manufacturing Company (TSMC) has recently approved the sale of its 18.87-percent holding in Taiwan Semiconductor Technology Corp. (TSTC) to Amkor Technology Inc. This follows a similar sell-off of holdings in TSTC by Acer Inc.
TSMC, the world's largest microchip foundry, said in a statement that the sale of 50 million shares to Amkor would help it garner T$115 million in cash and 505,050 shares of semiconductor packaging and test service provider Amkor. TSMC will receive an additional T$86.5 million of Amkor shares or equivalent cash value if TSTC meets its 2001 revenues.
Flip chip on leadframe package
CHANDLER, ARIZ. – Yet another flip chip package option has appeared, with Amkor Technology's flip chip on MicroLeadFrame (MLF) now being provided for evaluation. A key feature of the package is the short interconnect distance between the ICs and the printed circuit board, because of the minimal leadframce structure within the package. Amkor says that it is the first combination of an 8-mil leadframe pitch and 200-micron flip chip ball pitch.
The package incorporates modest leadcounts (up to 100 I/O) because of the constraints of a leadframe and the small package body. It is designed for 5 – 20 GHz performance, with the reduced insertion loss and parasitics making this frequency range possible.
SEMI book-to-bill hits bottom?
SAN JOSE, CALIF. – A new record low was set with SEMI's book-to-bill ratio in April 2001. The 0.42 value of the book-to-bill, the ratio of orders booked in semiconductor manufacturing equipment to orders shipped, was the lowest ever since SEMI began reporting the data 10 years ago. The low point in the 1998 semiconductor industry downturn was 0.56.
SEMI also revised its 2001 worldwide projection for the semiconductor equipment industry, predicting $35 billion in chip gear sales for 2001. This is a 27 percent decline from the $47.7 billion market in 2000. The current projections are for 3 percent growth in 2002, followed by 22 percent growth in 2003. The historical average over many decades is a surprisingly consistent 17 percent growth. The growth in 2000 was 87 percent, so the shrinking market in 2001 should not be a surprise.
 Table 1. SEMI's book-to-bill ratio for front-end and back-end semiconductor manufacturing equipment. |
Contributing to the slump in 2001 is a likely decrease in the quantity of ICs shipped this year. In most downturns, there is still an increase in the volume of shipments, with the lower revenues reflecting lower average selling prices. This year is expected to be the first since 1985 that the annual volume was lower than the previous year.
SEMI's book-to-bill ratio is divided into front-end and back-end equipment. The two sectors have been on a par in 2001, but the back-end book-to-bill was well below 1.00 in October 2000 when the front-end number was still significantly above 1.00 (Table 1). The freefall was in full force in April with a 40 percent drop in orders compared to March in both back-end equipment and overall (Figure 1).
 Figure 1. Back-end semiconductor equipment bookings and shipments. (Source: SEMI) |
Back-end orders have dropped 77 percent in six months, while back-end shipments are down 56 percent in that span.
Many analysts believe, however, that the end of the downturn is near, with positive signs appearing now. Eric Ross, a semiconductor equipment analyst at Thomas Weisel Partners, expects the book-to-bill ratio to go up after April, with orders increasing in the fourth quarter of 2001. Ross says that the inventory levels of end products have been worked off, so the demand should be increasing again shortly.
IBM focuses on SiGe technology
EAST FISHKILL, N.Y. – IBM has recently announced a technology agreement with Mitsubishi Electric Corp. that aims to accelerate the introduction of high-performance, low-power microchips for third-generation (3G) cellular telephones. Under the multi-year joint development agreement, IBM and Mitsubishi Electric are designing radio frequency integrated circuit (RFIC) chipsets for 3G wireless handsets. The highly integrated chipsets will be based on Mitsubishi Electric's cellular circuit and system expertise, and manufactured by IBM using its silicon germanium (SiGe) communications chip technology. Mitsubishi Electric plans to incorporate the 3G RFICs into its cellular products. Chipsets will be shipped in volume to Mitsubishi in the fourth quarter of 2001.
KLA-Tencor and Teradyne align
SAN JOSE, CALIF. – KLA-Tencor Corp. and Teradyne Inc. have made plans to engage in a pilot program to incorporate KLA-Tencor's e-diagnostics technology into Teradyne's latest semiconductor test products. This technology will enable Teradyne's field and factory engineers to provide real-time, on-line service and applications support to its customers. As a result, Teradyne's customers will reportedly attain such benefits as increased test system availability and faster production ramp through more efficient transfer of test programs.
KLA-Tencor's e-diagnostics technology is the foundation of the company's iSupport program, which enables KLA-Tencor technical experts to remotely access KLA-Tencor tools at customer sites and operate them in real time to diagnose and resolve problems when they occur.
According to G. Dan Hutcheson, president of VLSI Research Inc. (San Jose, Calif.), the continuing trend toward greater complexity in the semiconductor manufacturing process and the adoption of 300 mm have made minimizing tool cost of ownership one of the most pressing issues in the semiconductor industry.
“Chipmakers and equipment manufacturing alike are looking for innovative methods to help improve overall fab and equipment efficiency to stem rising manufacturing costs. E-diagnostics is one of the methods needed to address this challenge,” said Hutcheson.
Award entries surpass expectations
NASHUA, N.H. – The packaging industry will have a few more stars among them as winners of The 2001 Advanced Packaging Awards program are announced this month. Partnering with SEMICON West 2001, envelope seals announcing the winners of the first annual competition will be broken at an invitation-only evening affair in San Jose on Wednesday, July 18.
Aimed to recognize outstanding product innovations, the competition received more entries than anticipated in this first year of the program. Names of the winners will be listed on Advanced Packaging magazine's Web site, www.apmag.com, following the event. Winners will also be honored in the pages of the September 2001 issue of Advanced Packaging magazine.
It's also not too early to think about entering next year's program. Products launched between April 1, 2001, and March 31, 2002, are eligible for The 2002 Advanced Packaging Awards program. To receive information about the 2002 program, please contact Amy Knutson-Strack ([email protected]).